ADE7753ARSZ Analog Devices Inc, ADE7753ARSZ Datasheet - Page 51

• Manufacturer Part Number: ADE7753ARSZ
• Description: IC ENERGY METERING 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7753ARSZ

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Ic Function: Single-Phase Multifunction Metering IC
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADE7753ZEB - BOARD EVALUATION AD7753
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADE7753 REGISTERS
Table 10. Summary of Registers by Address
Address
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
Name
WAVEFORM
AENERGY
RAENERGY
LAENERGY
VAENERGY
RVAENERGY
LVAENERGY
LVARENERGY
MODE
IRQEN
STATUS
RSTSTATUS
CH1OS
CH2OS
GAIN
PHCAL
APOS
R/W
R
R
R
R
R
R
R
R
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
No. Bits
24
24
24
24
24
24
24
24
16
16
16
16
8
8
8
6
16
Default
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x000C
0x40
0x0
0x0
0x00
0x0
0x0
0x0D
0x0
Type
U
U
U
U
U
U
U
S
S
U
S
S
S
S
S
S
S
*
*
1
Rev. A | Page 51 of 60
Descriptio
Waveform
data from either Channel 1, Channel 2, or the active power signal. The data
source an
Bits 14 an
Channel 2
Active Ene
in this 24-
Same as t
following
Line Accu
is accumu
line cycles
Apparent
read-only
Same as the VAENERGY register except that the register is reset to 0
following a read operation.
Line Accumulation Apparent Energy Register. The instantaneous real
power is accumulated in this read-only register over the LINECYC number
of half line cycles.
Line Accumulation Reactive Energy Register. The instantaneous reactive
power is accumulated in this read-only register over the LINECYC number
of half line cycles.
Mode Register. This is a 16-bit register through which most of the ADE7753
functionality is accessed. Signal sample rates, filter enabling, and
calibration modes are selected by writing to this register. The contents can
be read at any time—see the Mode Register (0x9) section.
Interrupt Enable Register. ADE7753 interrupts can be deactivated at any time
by setting the corresponding bit in this 16- bit enable register to Logic 0.
The status register continues to register an interrupt event even if disabled.
However, the IRQ output is not activated—see the ADE7753 Interrupts
section.
Interrupt Status Regist
register contains information regarding the source of ADE7753
interrupts—the see ADE7753 Interrupts section.
Same as the interrupt status register except that the register contents are
reset to 0 (all flags cleared) after a read operation.
Channel 1 Offset Adjust. Bit 6 is not used. Writing to Bits 0 to 5 allows
offsets on Channel 1 to be removed—see the Analog Inputs and CH1OS
Register (0x0D) sections. Writing a Logic 1 to the MSB of this register
enables the digital integrator on Channel 1, a Logic 0 disables the
integrator. The default value of this bit is 0.
Channel 2 Offset Adjust. Bits 6 and 7 are not used. Writing to Bits 0 to 5 of
this register allows any offsets on Channel 2 to be removed—see the
Analog Inputs section. Note that the CH2OS register is inverted. To apply a
positive offset, a negative number is written to this register.
PGA Gain Adjust. This 8-bit register is used to adjust the gain selection for
the PGA in Channels 1 and 2—see the Analog Inputs section.
Phase Calibration Register. The phase relationship between Channel 1 and
2 can be adjusted by writing to this 6-bit register. The valid content of this
twos compliment register is between 0x1D to 0x21. At a line frequency of
60 Hz, this is a range from –2.06° to +0.7°—see the Phase Compensation
section.
Active Power Offset Correction. This 16-bit register allows small offsets in
the active power calculation to be removed—see the Active Power
Calculation section.
d 13 in the mode register—see the Channel 1 Sampling and
he active energy register except that the register is reset to 0
d the length of the waveform registers are selected by data
bit, read-only register—see the Energy Calculation section.
mulation Active Energy Register. The instantaneous active power
a read operation.
lated in this read-only register over the LINCYC number of half
Energy Register. Apparent power is accumulated over time in t
.
register.
n
rgy Register. Active power is accumulated (integrated) over time
Sampling sections.
Register. This read-only register contains the sampled waveform
er. This is an 16-bit read-only register. The status
ADE7753
his