CP2402-GM Silicon Laboratories Inc, CP2402-GM Datasheet - Page 55

• Manufacturer Part Number: CP2402-GM
• Description: IC LCD DRIVER 32QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2402-GM

• Package / Case: 32-QFN
• Display Type: LCD
• Configuration: 64 Segment
• Interface: SPI Serial
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1863-5

9.6.
After waking from ULP Mode, the ULPST register may be used to determine the cause of wake up. The three pos-
sible wake up sources are SmaRTClock Alarm, SmaRTClock Oscillator Failure, and ULP Port Match. If none of the
bits in ULPST are set, then the wake up was due to the NSS or PWR pin falling edge.
This register may be cleared by writing a 1 to the CLEAR (MSCN.6) bit in the master control register.
SFR Definition 9.2. ULPST: Ultra Low Power Status Register
Address = 0x42
Name
Reset
7:3
Bit
Type
2
1
0
Bit
RTCALRM SmaRTClock Alarm Wake Up Indicator.
RTCFAIL
Determining the ULP Mode Wake-Up Source
Unused
ULPPM
Name
R
7
0
Read = 00000b. Write = Don’t Care.
SmaRTClock Oscillator Fail Wake Up Indicator.
0: Source of last wake up was not a SmaRTClock Oscillator Fail.
1: Source of last wake up was a SmaRTClock Oscillator Fail.
0: Source of last wake up was not a SmaRTClock Alarm.
1: Source of last wake up was a SmaRTClock Alarm.
Ultra Low Power Port Match Wake Up Indicator.
0: Source of last wake up was not a ULP Port Match.
1: Source of last wake up was a ULP Port Match.
R
6
0
R
5
0
Rev. 1.0
R
4
0
Function
R
3
0
RTCFAIL
R
2
0
CP2400/1/2/3
RTCALRM
R
1
0
ULPPM
varies
R
0
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