HEF4511BT,652 NXP Semiconductors, HEF4511BT,652 Datasheet - Page 9

IC BCD-7 SEG DECODER/DRVR 16SOIC

HEF4511BT,652

Manufacturer Part Number
HEF4511BT,652
Description
IC BCD-7 SEG DECODER/DRVR 16SOIC
Manufacturer
NXP Semiconductors
Datasheets

Specifications of HEF4511BT,652

Package / Case
16-SOIC (3.9mm Width)
Display Type
LED
Configuration
7 Segment
Interface
BCD
Voltage - Supply
3 V ~ 15 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
Latch/Decoder/Driver
Logic Family
HE4000B
Number Of Lines (input / Output)
7.0 / 7.0
Propagation Delay Time
120 ns
Supply Voltage (max)
15 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Input Lines
7.0
Number Of Output Lines
7.0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Digits Or Characters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3125-5
933373180652
HEF4511BTD
NXP Semiconductors
Table 8.
V
[1]
Table 9.
P
HEF4511B_6
Product data sheet
Symbol
t
t
t
t
t
t
Symbol
P
PLH
THL
TLH
su
h
W
SS
D
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
Parameter
LOW to HIGH
propagation delay
HIGH to LOW output
transition time
LOW to HIGH output
transition time
set-up time
hold time
pulse width
Dynamic characteristics
Dynamic power dissipation P
Parameter
dynamic power
dissipation
amb
= 25
°
C; for test circuit see
V
10 V
15 V
5 V
DD
Conditions
Dn → Qn;
see
LE → Qn;
see
BL → Qn;
see
LT → Qn;
see
see
see
Dn → LE;
see
Dn → LE;
see
LE input LOW;
minimum width;
see
…continued
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
Figure 7
Figure 7
Figure 7
Typical formula for P
P
P
P
Figure
D
D
D
D
= 1000 × f
= 4000 × f
= 10000 × f
SS
Rev. 06 — 7 December 2009
8.
= 0 V; t
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
DD
i
i
+ Σ(f
+ Σ(f
i
+ Σ(f
r
= t
o
o
f
o
× C
× C
Extrapolation formula
108 ns + (0.55 ns/pF)C
133 ns + (0.55 ns/pF)C
× C
D
44 ns + (0.23 ns/pF)C
32 ns + (0.16 ns/pF)C
59 ns + (0.23 ns/pF)C
42 ns + (0.16 ns/pF)C
78 ns + (0.55 ns/pF)C
29 ns + (0.23 ns/pF)C
22 ns + (0.16 ns/pF)C
33 ns + (0.55 ns/pF)C
19 ns + (0.23 ns/pF)C
17 ns + (0.16 ns/pF)C
10 ns + (1.00 ns/pF)C
20 ns + (1.00 ns/pF)C
13 ns + (0.06 ns/pF)C
10 ns + (0.06 ns/pF)C
20 ns; T
9 ns + (0.42 ns/pF)C
6 ns + (0.28 ns/pF)C
(μW)
L
L
) × V
) × V
L
) × V
DD
DD
amb
DD
2
2
2
BCD to 7-segment latch/decoder/driver
= 25
°
C.
where:
f
f
C
V
Σ(f
i
o
DD
= input frequency in MHz;
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
= output frequency in MHz;
[1]
o
= output load capacitance in pF;
× C
= supply voltage in V;
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
) = sum of the outputs.
50
25
20
60
30
25
80
40
35
HEF4511B
Typ
135
160
105
55
40
70
50
40
30
60
30
25
60
30
20
25
16
13
25
12
30
15
12
40
20
17
© NXP B.V. 2009. All rights reserved.
9
Max
270
110
320
140
100
210
120
120
-
-
-
-
-
-
-
-
-
80
80
60
60
50
60
40
50
32
26
L
in pF).
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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