PCF8534AHL/1,518 NXP Semiconductors, PCF8534AHL/1,518 Datasheet - Page 27

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PCF8534AHL/1,518

Manufacturer Part Number
PCF8534AHL/1,518
Description
IC LCD DISPLAY DRVR 60SEG 80LQFP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PCF8534AHL/1,518

Package / Case
80-LQFP
Display Type
LCD
Configuration
60 Segment
Interface
I²C
Current - Supply
8µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Digits
30
Number Of Segments
240
Maximum Clock Frequency
400 KHz
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Maximum Supply Current
50 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-5058-2
935289852518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8534AHL/1,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
PCF8534A_5
Product data sheet
8.4 Display controller
Table 13.
See
[1]
Table 14.
See
[1]
The display controller executes the commands identified by the command decoder. It
contains the status registers of the PCF8534A and coordinates their effects.
The controller also loads display data into the display RAM as required by the storage
order.
Bit
7 to 2
1
0
Bit
7 to 3
2
1 to 0
The bank select command has no effect in 1:3 or 1:4 multiplex drive modes.
Only normal blinking can be selected in multiplexer 1:3 or 1:4 drive modes.
Section
Section
Symbol
-
I
O
Symbol
-
A
BF[1:0]
Bank select command bit description
Blink select command bit description
7.10,
7.15.
Section
Value
1 1110
0
1
00
01
10
11
Value
11 1110
0
1
0
1
Rev. 05 — 6 August 2009
7.11,
Section
Description
fixed value
blink mode selection
blink frequency selection
Description
Static
fixed value
input bank selection: storage of arriving display data
output bank selection: retrieval of LCD display data
normal blinking
blinking by alternating display RAM banks
off
1
2
3
RAM bit 0
RAM bit 2
RAM bit 0
RAM bit 2
7.12,
Section 7.13
Universal LCD driver for low multiplex rates
[1]
and
Section
1:2 multiplex
RAM bits 0 and 1
RAM bits 2 and 3
RAM bits 0 and 1
RAM bits 2 and 3
7.14.
PCF8534A
© NXP B.V. 2009. All rights reserved.
[1]
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