DS2782G-5+T&R Maxim Integrated Products, DS2782G-5+T&R Datasheet - Page 20

• Manufacturer Part Number: DS2782G-5+T&R
• Description: IC FUEL GAUGE STND-ALONE 10-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of DS2782G-5+T&R

• Function: Fuel, Gas Gauge/Monitor
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CONTROL REGISTER
All CONTROL register bits are read and write accessible. The CONTROL register is recalled from Parameter
EEPROM memory at power-up. Register bit values can be modified in shadow RAM after power-up. Shadow RAM
values can be saved as the power up default values by using the Copy Data command.
Figure 19. Control Register Format
Reserved
UVEN
PMOD
Reserved
SPECIAL FEATURE REGISTER
All Special Feature Register bits are read and write accessible, with default values specified in each bit definition.
Figure 20. Special Feature Register Format
Reserved
SAWE
PIOSC
ADDRESS
ADDRESS
FIELD
FIELD
60h
15h
BIT
BIT
0:4
2:7
7
6
5
1
0
Read/Write
Read/Write
Read/Write
Read/Write
FORMAT
FORMAT
Undefined
Under Voltage SLEEP Enable
0: Disables transition to SLEEP mode based on VIN voltage
1: Enables transition to SLEEP mode if,
Power Mode Enable
0: Disables transition to SLEEP mode based on SDA, SCL logic state
1: Enables transition to SLEEP mode if SDA, SCL at a logic low for
t
Undefined
Undefined
Slave Address Write Enable
0: Disables writes to the Slave Address Register
1: Enables writes to the Slave Address Register
Power-up default: 0 (writes disabled)
PIO Sense and Control
Read values
0: PIO pin ≤ Vil
1: PIO pin ≥ Vih
Write values
0: Activates PIO pin open-drain output driver, forcing the PIO pin low
1: Disables the output driver, allowing the PIO pin to be pulled high or
Power-up and SLEEP mode default: 1 (PIO pin is hi-Z)
Note: PIO pin has weak pulldown
SLEEP
VIN < V
used as an input
20 of 28
SLEEP
AND SDA, SCL stable at either logic level for t
ALLOWABLE VALUES
ALLOWABLE VALUEs
BIT DEFINITION
BIT DEFINITION
SLEEP