ISL6252HRZ Intersil, ISL6252HRZ Datasheet - Page 19

IC BATTERY CHARGER CTRLR 28-QFN

ISL6252HRZ

Manufacturer Part Number
ISL6252HRZ
Description
IC BATTERY CHARGER CTRLR 28-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6252HRZ

Function
Charge Management
Battery Type
Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
Voltage - Supply
7 V ~ 25 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
In most cases the Battery resistance is very small (<200mΩ)
resulting in a very low Q in the output filter. This results in a
frequency response from the input of the PWM to the
inductor current with a single pole at the frequency
calculated in Equation 29:
The output capacitor creates a pole at a very high frequency
due to the small resistance in parallel with it. The frequency
of this pole is calculated in Equation 30:
CHARGE CURRENT CONTROL LOOP
When the battery voltage is less than the fully charged
voltage, the voltage error amplifier goes to it’s maximum
output (limited to 1.2V above ICOMP) and the ICOMP
voltage controls the loop through the minimum voltage
buffer. Figure 19 shows the charge current control loop.
f
f
POLE1
POLE2
ICOMP
V
INPUT
GAIN = 11
PWM
RAMP
PWM
RAMP GEN
INPUT
C
PWM
S
Σ
ICOMP
=
=
FIGURE 19. CHARGE CURRENT LIMIT LOOP
= VDD/11
11
(
------------------------------------------------------------------------------------------------------ -
-------------------------------------- -
2π C
R
FIGURE 18. SMALL SIGNAL AC MODEL
SENSE
R FET_r
11
+
-
0.25
gm2
o
1
PHASE
+
-
-
+
R
+
BAT
DS(ON)
r
DS ON
CHLIM
R
(
2π L
FET
L
)
CA2
_r
19
+
20
DS(ON)
R
VDD
R L_DCR
DCR
+
-
+
-
CSON
CSOP
+
R
L
BAT
R SENSE
L
R
ESR
CO
)
R
CO
L_DCR
C
R
C
F2
ESR
O
R F2
ISL6252, ISL6252A
(EQ. 29)
(EQ. 30)
R BAT
R
R
S2
BAT
The compensation capacitor (C
amplifier (GMI) a pole at a very low frequency (<<1Hz) and a
a zero at f
ICOMP. The frequency of can be calculated from
Equation 31:
Placing this zero at a frequency equal to the pole calculated
in Equation 29 will result in maximum gain at low frequencies
and phase margin near 90°. If the zero is at a higher
frequency (smaller C
the phase margin will be lower. Use a capacitor on ICOMP
that is equal to or greater than the value calculated in
Equation 32:
A filter should be added between R
to reduce switching noise. The filter roll off frequency should
be between the crossover frequency and the switching
frequency (~100kHz). R
minimize offsets due to leakage current into CSOP. The filter
cut-off frequency is calculated using Equation 33:
The crossover frequency is determined by the DC gain of the
modulator and output filter and the pole in Equation 29. The
DC gain is calculated in Equation 34 and the crossover
frequency is calculated with Equation 35.
C
f
f
A
f
ZERO
FILTER
CO
ICOMP
DC
=
=
A
=
--------------------------------------------------------------------------------------------------------- -
(
DC
R
=
=
---------------------------------------
(
S2
Z1
2π C
------------------------------------------ -
(
----------------------------------------------------------------------------------------- -
(
2π C
. f
R
f
4 gm2
+
POLE1
S2
Z1
r
DS ON
ICOMP
is created by the 0.25*CA2 output added to
+
F2
1
(
r
DS ON
4
=
R
ICOMP
(
)
11 R
)
F2
11 R
--------------------- -
+
(
50μA V
2π L
F2
R
)
)
DCR
+
should be small (<10Ω) to
S2
), the DC gain will be higher but
R
S2
gm2
DCR
+
ICOMP
)
R
BATTERY
=
+
S2
R
50μA
-------------- -
BAT
and CSOP and CSON
V
) gives the error
)
)
August 25, 2010
(EQ. 33)
(EQ. 35)
(EQ. 31)
(EQ. 32)
(EQ. 34)
FN6498.3

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