ISL6252HRZ Intersil, ISL6252HRZ Datasheet
ISL6252HRZ
Specifications of ISL6252HRZ
Related parts for ISL6252HRZ
ISL6252HRZ Summary of contents
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... Ordering Information PART TEMP NUMBER PART RANGE (Notes MARKING (°C) ISL6252HRZ ISL 6252HRZ -10 to +100 28 Ld 5x5 ISL6252HAZ ISL 6252HAZ -10 to +100 24 Ld ISL6252AHRZ ISL6252 AHRZ -10 to +100 28 Ld 5x5 ISL6252AHAZ ISL6252 AHAZ -10 to +100 24 Ld NOTES: 1. Please refer to TB347 for details on reel specifications ...
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Pinouts ISL6252, ISL6252A (28 LD QFN) TOP VIEW CELLS 2 3 ICOMP 4 VCOMP ICM 5 6 VREF 7 CHLIM ISL6252, ISL6252A CSOP 20 ...
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ISL6252, ISL6252A ACSET ACPRN + - 1.26V VREF 152kΩ ADAPTER CURRENT ACLIM LIMIT SET 152kΩ ICOMP MIN VOLTAGE BUFFER VCOMP VREF 514kΩ gm1 VADJ - 514kΩ 2.1V VOLTAGE CELLS SELECTOR VDD REFERENCE VREF GND FB FIGURE 1. FUNCTIONAL BLOCK DIAGRAM ...
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AC ADAPTER R8 130k 0.1µF R9 DCIN DCIN DCIN DCIN 10.2k 1% ACSET ACSET ACSET ACSET C7 C7 1µF VDDP VDDP VDDP VDDP R10 R10 R10 R10 3.3V 3.3V 4.7 4.7Ω VDD VDD VDD VDD C9 R5 ...
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ADAPTER R8 130k 0.1µF R9 10. µF R10 R10 C9 C9 4.7Ω 1 1µF VCC R16 R5 100k 100k DIGITAL INPUT D/A OUTPUT OUTPUT R7: R7: 100Ω A/D INPUT C11 C11 3300pF ...
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... Junction Temperature Range .-10°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp TEST CONDITIONS EN = VDD or GND, 7V ≤ DCIN ≤ 25V DCIN = 0, no load 7V ≤ DCIN ≤ 25V, 0 ≤ I ≤ ...
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Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C ≤ +125°C, Unless ...
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Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C ≤ +125°C, Unless ...
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Typical Operating Performance 0.6 0.3 0.0 -0.3 -0 LOAD CURRENT (mA) FIGURE 4. VDD LOAD REGULATION CSIP-CSIN (mV) FIGURE ...
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Typical Operating Performance FIGURE 10. CHARGE ENABLE AND SHUTDOWN CHLIM = 0.2V CHLIM=0.2V CHLIM=0.2V CSON = 8V CSON=8V CSON=8V FIGURE 12. SWITCHING WAVEFORMS AT DIODE EMULATION ADAPTER REMOVAL ADAPTER REMOVAL ADAPTER REMOVAL FIGURE 14. AC ADAPTER REMOVAL 10 ISL6252, ISL6252A ...
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Typical Operating Performance Functional Pin Descriptions BOOT Connect BOOT to a 0.1µF ceramic capacitor to PHASE pin and connect to the cathode of the bootstrap Schottky diode. UGATE UGATE is the high side MOSFET gate drive output. LGATE LGATE is ...
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VADJ VADJ adjusts battery regulation voltage. VADJ = VREF for 4.2V + 5%/cell; VADJ = Floating for 4.2V/cell; VADJ = GND for 4.2V - 5%/cell. Connect to a resistor divider to program the desired battery cell voltage between 4.2V - ...
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Setting the Battery Regulation Voltage The ISL6252 uses a high-accuracy trimmed band-gap voltage reference to regulate the battery charging voltage. The VADJ input adjusts the charger output voltage, and the VADJ control voltage can vary from 0 to VREF, providing ...
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Equation 5 shows the formula for the max full scale CSOP-CSON voltage (in mV) for the ISL6252: ISL6252 ( ) • MAX CSOP CSON CHLIM 50 – • MIN CSOP CSON CHLIM 50 5 – = ...
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Current Measurement Use ICM to monitor the input current being sensed across CSIP and CSIN. The output voltage range 2.5V. The voltage of ICM is proportional to the voltage drop across CSIP and CSIN, and is given ...
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Inductor Selection The inductor selection has trade-offs between cost, size, crossover frequency and efficiency. For example, the lower the inductance, the smaller the size, but ripple current is higher. This also results in higher AC losses in the magnetic core ...
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The LGATE gate driver can drive sufficient gate current to switch most MOSFETs efficiently. However, some FETs may exhibit cross conduction (or shoot through) due to current injected into the drain-to-source parasitic capacitor (C the high dV/dt rising edge at ...
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CSNUB and RSNUB can be calculated from Equations 26 and 27 ------------------------------------ - = SNUB ⋅ 2πF L ring ⋅ 2 ...
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VDD RAMP GEN V = VDD/11 RAMP - + PWM INPUT PWM GAIN = L_DCR R FET_r DS(ON) PWM INPUT FIGURE 18. SMALL SIGNAL AC MODEL In most cases the Battery resistance is very small (<200mΩ) ...
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The Bode plot of the loop gain, the compensator gain and the power stage gain is shown in Figure 20 ZERO -20 f POLE1 f FILTER -40 f POLE2 -60 0.01k 0.1k 1k 10k FREQUENCY ...
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R = 200mΩ BATTERY - 50mΩ -50 BATTERY -60 -20 -40 -60 -80 -100 -120 -140 -160 100 200 500 10k 20k FREQUENCY FIGURE 23. FREQUENCY RESPONSE OF THE ...
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TABLE 3. CELLS 288kΩ 3 320kΩ 4 336kΩ Choose R equal or lower than the value calculated VCOMP from Equation 43: ( ⋅ ) ⋅ ( ⋅ ⋅ 0.7 f 2π VCOMP LC o ...
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SENSE HIGH RESISTOR RESISTOR CURRENT TRACE KELVIN CONNECTION TRACES TO THE LOW PASS FILTER AND CSOP AND CSON FIGURE 25. CURRENT SENSE RESISTOR LAYOUT EN Pin This pin stays high at enable mode and low at idle mode and ...
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Package Outline Drawing L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/07 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 65 TYP ) ( 3. 10) TYPICAL RECOMMENDED LAND PATTERN 24 ISL6252, ISL6252A A ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...