NCP1205DR2G ON Semiconductor, NCP1205DR2G Datasheet - Page 13

IC CTRLR PWM CM OVP HV 16SOIC

NCP1205DR2G

Manufacturer Part Number
NCP1205DR2G
Description
IC CTRLR PWM CM OVP HV 16SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1205DR2G

Output Isolation
Isolated
Frequency Range
90 ~ 125kHz
Voltage - Input
8 ~ 30 V
Operating Temperature
-25°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Number Of Outputs
1
Output Current
250 mA
Mounting Style
SMD/SMT
Switching Frequency
110 KHz
Operating Supply Voltage
30 V
Maximum Operating Temperature
+ 125 C
Fall Time
30 ns
Minimum Operating Temperature
- 25 C
Rise Time
30 ns
Synchronous Pin
No
Topology
Flyback, Forward
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP1205DR2G
NCP1205DR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1205DR2G
Manufacturer:
ON/安森美
Quantity:
20 000
we have entered the above circuit into a SPICE simulator
and observed the output waveforms. When FB is within
regulation, the error flag is low. However, as soon as FB
leaves its normal operating area, the OPAMP can no longer
keep the V(- -) point and either goes to the positive top or
down to zero: the error flag goes high.
128 ms operation, the capacitor used for the timing is Ct,
To illustrate how the system reacts to a variable FB level,
Because of the large amount of delay necessary for this
Figure 15. By Monitoring the Internal Virtual Ground, the System can Detect the Presence of a Fault
Figure 14. This Typical Arrangement Allows for an Easy Fault Detection Management
500.0 M
V
6.500
4.500
2.500
fb
+
+
V
V
1.5 V
fb
low
Ri
50 k
1.000 M
1.5 V
V(--)
Monitor
OCP Condition
3.000 M
http://onsemi.com
V
V
Regulation Area
HIGH
LOW
Rf
150 k
3
1
+
5
13
V1
2.5 V
= 5 mV
5.000 M
= 3 V
+
--
+
--
connected from ground to pin 5. In normal VFM operation,
this timing capacitor serves as the VCO capacitor and the
error management circuit is transparent. As soon as an error
is detected (error flag goes high), an internal switch routes
Ct to the 128 ms generator. As a first effect, the switching
frequency is no longer controlled by the VCO (if the error
appears during VFM) and the system is relaxed to natural
BCM. The capacitor now ramps up and down to be further
divided and finally create the 128 ms delay.
Error Flag
7
2
7.000 M
OCP
Circuitry
FB
2R
Virtual Point
6
9.000 M
R
Current
Setpoint

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