NCP1351ADR2G ON Semiconductor, NCP1351ADR2G Datasheet - Page 15

• Manufacturer Part Number: NCP1351ADR2G
• Description: IC CTRLR PWM VAR-OFF TIME 8-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1351ADR2G

• Output Isolation: Isolated
• Frequency Range: Adjusting
• Voltage - Input: 9.5 ~ 28 V
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Output Voltage: - 0.3 V to + 20 V
• Output Current: 400 mA
• Mounting Style: SMD/SMT
• Operating Supply Voltage: - 0.3 V to + 28 V
• Maximum Operating Temperature: + 150 C
• Fall Time: 100 ns
• Rise Time: 90 ns
• Synchronous Pin: No
• Topology: Flyback
• Input Voltage: 12V
• Supply Voltage Range: 6V To 22V
• Digital Ic Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -25°C To +125°C
• Rohs Compliant: Yes
• Frequency: 65kHz
• Controller Type: PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1351ADR2GOSCT

At this point, the current is fully compressed and remains
frozen. To further decrease the transmitted power, the
frequency does not have other choice than going down.
peak current is set to 270 mA whereas the compressed
current goes down to 70 mA. The NCP1351 can thus be
considered as a multi operating mode circuit:
•
•
•
we recommend to wire a pulldown resistor and a capacitor
in parallel from the FB pin to the controller ground
(Figure 17). Please keep these elements as close as possible
to the circuit. The pulldown resistor increases the
optocoupler current but also plays a role in standby. We
found that a 2.5 kW resistor was giving a good tradeoff
between optocoupler operating current (internal pole
position) and standby power.
270 mA
70 mA
Figure 16. The NCP1351 Peak Current Compression
Looking to the data-sheet specifications, the maximum
For biasing purposes and noise immunity improvements,
Real fixed peak current / variable frequency mode for
FB current below 60 mA.
Then maximum peak current decreases to I
narrow linear range of I
by a discrete jump from I
60 mA and 80 mA.
Then if
current/variable frequency mode with reduced peak
current
CS Current
Figure 17. The Recommended Feedback
(A, B versions)
I
FB
FAULT
Arrangement Around the FB Pin
keeps on increasing, in a real fixed peak
V
CC
40 mA
R1
2.5k
Scheme
FB
CS,max
(to avoid instability created
60 mA
to I
C1
100nF
80 mA
CS,min
), between
FB
CS,min
FB Current
http://onsemi.com
over a
NCP1351
15
Fault detection
current, as shown on Figure 19. When the feedback current
decreases below 40 mA, an external capacitor is charged by
a 11.7 mA source. As the voltage rises, a comparator detects
when it reaches 5 V typical. Upon detection, there can be
two different scenarios:
case.
The fault detection circuitry permanently observes the FB
The duty-burst in fault is around 7% in this particular
Figure 18. Hiccup Occurs with the B Version Only,
1. A version: the circuit immediately latches-off and
2. B version: the circuit stops its output pulses and
3. C version: this version includes the dual Over
4. D version: this version includes the dual Over
remains latched until the voltage on the current
into the V
is made via an internal SCR circuit who holds
VCC to around 6 V when fired. As long as the
current flowing through this latch is above a few
mA, the circuit remains locked-out. When the user
unplugs the converter, the V
and resets the latch.
the auxiliary V
consumption (≈600 mA). When it touches the
V
crank the power supply. If it fails again, an hiccup
mode takes place (Figure 18).
Current Protection (OCP) level. When the
switching frequency imposed by the feedback loop
reaches around 50% of the maximum value set by
the Ct capacitor, the timer starts to count down. If
the fault disappears, the timer is reset. When the
fault is finally confirmed, the controller latches off
as the A version.
Current Protection (OCP) level. When the
switching frequency imposed by the feedback loop
reaches around 50% of the maximum value set by
the Ct capacitor, the timer starts to count down. If
the fault disappears, the timer is reset. When the
fault is finally confirmed, the controller enters
auto-recovery mode, as with the B version.
CC(min)
the A Version Being Latched
point, the circuit re-starts and attempts to
CC
pin drops below a few mA. The latch
V
CC
drv
decreases via the controller own
V
CC
CC
current falls down