NCP1351ADR2G ON Semiconductor, NCP1351ADR2G Datasheet - Page 13

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NCP1351ADR2G

Manufacturer Part Number
NCP1351ADR2G
Description
IC CTRLR PWM VAR-OFF TIME 8-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1351ADR2G

Output Isolation
Isolated
Frequency Range
Adjusting
Voltage - Input
9.5 ~ 28 V
Operating Temperature
-25°C ~ 125°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Number Of Outputs
1
Output Voltage
- 0.3 V to + 20 V
Output Current
400 mA
Mounting Style
SMD/SMT
Operating Supply Voltage
- 0.3 V to + 28 V
Maximum Operating Temperature
+ 150 C
Fall Time
100 ns
Rise Time
90 ns
Synchronous Pin
No
Topology
Flyback
Input Voltage
12V
Supply Voltage Range
6V To 22V
Digital Ic Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-25°C To +125°C
Rohs Compliant
Yes
Frequency
65kHz
Controller Type
PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP1351ADR2GOSCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1351ADR2G
Manufacturer:
ON Semiconductor
Quantity:
500
Part Number:
NCP1351ADR2G
Manufacturer:
ON/安森美
Quantity:
20 000
dissipation penalty by arranging components around the
auxiliary as suggested by Figure 14. On this schematic, the
diode anode swings negative during the on time. This
negative level directly depends on the input voltage and
offsets the current sense pin via the R
integration is necessary to reduce the O
conditions. However, depending on the compensation level,
15% in high-line conditions. The turn-ratio between the
auxiliary winding and the primary winding is N
its value is 0.15. Thus, the voltage on D
negative during the on time to a level of:
If we selected a 3.7 kW resistor for R
maximum sense voltage being developed is:
The small RC network made of R
the voltage excursion on D
inductance value gives an on time of 3 ms at high-line. The
voltage across C
V aux_peak + -V in_max N aux + -375
V sense + 3.7 k
V C 3 +
Over power protection can be done without power
Suppose you would need to reduce the peak current by
t on V aux_peak
+
C
R 1 C 3
Bulk
3
thus swings down to:
Figure 14. The OPP is Relatively Easy to Implement and It Does not Waste Power
270 m + 1 V
+ -
CS
2
150 k
anode. Assume the primary
R
3 m
offset
1
and C
C4
22p
OPP
PP
270 p
56
aux
3
action in light load
, purposely limits
resistor. A small
offset
cathode swings
0.15 + -56 V
+ -4.2 V
aux
, then the
R
R
100k
. Assume
sense
OPP
(eq. 8)
(eq. 9)
http://onsemi.com
V
DRV
CC
(eq.
10)
NCP1351
13
the standby power can be affected. Again, the resistor R
should be placed as close as possible to the CS pin. The
22 pF can help to circumvent any picked-up noise and D
prevents the positive loading of the 270 pF capacitor during
the flyback swing. We have put a typical 100 kW O
resistor but a tweak is required depending on your
application.
Typically, we measured around –4 V on our 50 W prototype.
By calculation, we want to decrease the peak current by
15%. Compared to the internal 270 mA source, we need to
derive:
Thus, from the –4 V excursion, the R
derived by:
After experimental measurements, the resistor was
normalized down to 100 kW.
Feedback
works in current rather than voltage. Figure 15 details the
internal circuitry of this particular section. The optocoupler
injects a current into the FB pin in relationship with the
input/output conditions.
I offset + -0.15
R OPP +
Unlike other controllers, the feedback in the NCP1351
+
CV
D
aux
CC
1N4148
40.5 m
4
D2
+ 98 kW
L
aux
270 m + -40.5 mA
DRV
R1
150k
C3
270p
L
P
OPP
I
Lp
resistor is
(eq. 12)
(eq. 11)
OPP
PP
2

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