NCP1271P100G ON Semiconductor, NCP1271P100G Datasheet - Page 5

IC CTRLR PWM CM OVP OTP HV 7DIP

NCP1271P100G

Manufacturer Part Number
NCP1271P100G
Description
IC CTRLR PWM CM OVP OTP HV 7DIP
Manufacturer
ON Semiconductor
Series
Soft-Skip™r
Datasheet

Specifications of NCP1271P100G

Output Isolation
Either
Frequency Range
85 ~ 107kHz
Voltage - Input
9.1 ~ 20 V
Operating Temperature
-40°C ~ 150°C
Package / Case
8-DIP (0.300", 7.62mm), 7 Leads
Number Of Outputs
1
Duty Cycle (max)
80 %
Output Voltage
- 0.3 V to + 20 V
Output Current
800 mA
Mounting Style
Through Hole
Switching Frequency
100 KHz
Maximum Operating Temperature
+ 150 C
Fall Time
20 ns
Minimum Operating Temperature
- 40 C
Rise Time
30 ns
Synchronous Pin
No
Topology
Flyback
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP1271P100G
Manufacturer:
ON Semiconductor
Quantity:
2
Part Number:
NCP1271P100G
Manufacturer:
ON/安森美
Quantity:
20 000
5. Please refer to Figure 39 for detailed description.
6. Guaranteed by design.
ELECTRICAL CHARACTERISTICS
HV = open, skip = open, FB = 2 V, CS = Ground, DRV = 1 nF, unless otherwise noted.)
OSCILLATOR
GATE DRIVE
CURRENT SENSE
SKIP
EXTERNAL LATCH
SHORT−CIRCUIT FAULT PROTECTION
Oscillation Frequency (65 kHz Version, T
Oscillation Frequency (65 kHz Version, T
Oscillation Frequency (65 kHz Version, T
Oscillation Frequency (100 kHz Version, T
Oscillation Frequency (100 kHz Version, T
Oscillation Frequency (100 kHz Version, T
Oscillator Modulation Swing, in Percentage of f
Oscillator Modulation Swing Period
Maximum Duty Cycle (V
Gate Drive Resistance
Rise Time from 10% to 90% (Drv = 1.0 nF to Gnd)
Fall Time from 90% to 10% (Drv = 1.0 nF to Gnd)
Maximum Current Threshold
Soft−Start Duration
Soft−Skip Duration
Leading Edge Blanking Duration
Propagation Delay (Drv =1.0 nF to Gnd)
Ramp Current Source Peak
Ramp Current Source Valley
Default Standby Skip Threshold (Pin 1 = Open)
Skip Current (Pin 1 = 0 V, T
Skip Level Reset (Note 5)
Transient Load Detection Level to Disable Soft−Skip Mode
Latch Protection Threshold
Latch Threshold Margin (V
Noise Filtering Duration
Propagation Delay (Drv = 1.0 nF to Gnd)
Time for Validating Short−Circuit Fault Condition
Output High (V
Output Low (V
CC
CC
= 14 V, Drv = 1.0 V)
= 14 V, Drv = 300 W to Gnd)
CS
latch−m
Characteristic
= 0 V, V
J
= 25_C)
= V
FB
CC(off)
= 2.0 V)
(For typical values T
J
J
J
J
J
J
= 25_C)
= −40 to + 85_C)
= −40 to + 125_C)
− V
= 25_C)
= −40 to +85_C)
= −40 to +125_C)
osc
latch
)
http://onsemi.com
J
= 25°C, for min/max values, T
5
Pin
5
5
5
5
5
5
5
3
3
3
3
2
1
1
2
1
1
1
1
2
V
Symbol
V
I
I
skip−reset
t
ramp(H)
ramp(L)
V
T
D
V
V
latch−m
protect
R
I
R
t
I
f
Limit
t
t
LEB
skip
latch
osc
latch
max
SS
SK
skip
TLD
t
t
OH
OL
r
f
J
= −40°C to +125°C, V
61.75
0.95
Min
100
6.0
2.0
5.0
2.6
7.1
0.6
58
55
95
89
85
75
26
"7.5
2.85
Typ
100
100
100
300
180
100
100
130
6.0
6.0
1.0
4.0
1.2
5.7
8.0
1.2
65
65
65
80
30
20
50
43
13
11
0
CC
= 14 V,
68.25
Max
1.05
3.15
105
107
107
330
150
6.5
8.7
69
69
85
20
12
56
Unit
kHz
ms
ms
ms
ns
ns
ms
ns
ns
mA
mA
mA
ms
ns
%
%
W
V
V
V
V
V
V

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