NCP1271 ON Semiconductor, NCP1271 Datasheet
NCP1271
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NCP1271 Summary of contents
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... PWM Controller with Adjustable Skip Level and External Latch The NCP1271 represents a new, pin to pin compatible, generation of the successful 7-pin current mode NCP12XX product series. The controller allows for excellent stand by power consumption by use of its adjustable Soft-Skip mode and integrated high voltage startup FET ...
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... JEDEC 51 high conductivity test PCB. Test conditions were under natural convection or zero air flow. NCP1271 skip/latch Vcc Gnd Drv * NCP1271 R ramp Figure 1. Typical Application Circuit copper traces and heat spreading area. As specified for copper traces and heat spreading area. As specified http://onsemi.com 2 ...
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... The NCP1271's powerful output is capable of driving the gates of large Qg MOSFETs. This is the positive supply of the device. The operating range is between 10 V (min) and 20 V (max) with a UVLO start threshold 12.6 V (typ). This pin provides (1) Lossless startup sequence (2) Double hiccup fault mode (3) Memory for latch-off shutdown and (4) Device protection if V http://onsemi ...
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... CC(off) Noise Filtering Duration Propagation Delay (Drv = 1 Gnd) SHORT-CIRCUIT FAULT PROTECTION Time for Validating Short-Circuit Fault Condition 5. Please refer to Figure 39 for detailed description. 6. Guaranteed by design. NCP1271 (For typical values T = 25°C, for min/max values Pin = 25_C - 85_C) ...
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... 2 Guaranteed by design. 110 100 -50 - TEMPERATURE (°C) Figure 3. Oscillation Frequency vs. Temperature NCP1271 (continued) (For typical values T = 25°C, for min/max values Pin – 0 0.5 mA CC(on) Decreasing CC > 1.0 V) (Note 2 kHz Version ...
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... TEMPERATURE (°C) Figure 7. Soft-Start Duration vs. Temperature 1.40 1.30 1.20 1.10 1.00 -50 - TEMPERATURE (°C) Figure 9. Default Skip Level vs. Temperature NCP1271 TYPICAL CHARACTERISTICS 1.04 1.02 1.0 0.98 0.96 0.94 75 100 125 -50 -25 Figure 6. Current Limit vs. Temperature 350 300 250 200 150 100 100 125 -50 -25 Figure 8 ...
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... TEMPERATURE (°C) Figure 13. Latch Protection Level vs. Temperature 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 - TEMPERATURE (°C) Figure 15. Startup Inhibit Voltage vs. Temperature NCP1271 TYPICAL CHARACTERISTICS 3.0 2.9 2.8 2.7 2.6 2.5 -50 -25 75 100 125 Figure 12. Transient Load Detection Level vs. 150 145 140 135 130 125 120 115 110 105 100 75 ...
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... TEMPERATURE (°C) Figure 19. Startup Leakage Current vs. Temperature -50 - TEMPERATURE (°C) Figure 21. Supply Voltage Thresholds vs. Temperature NCP1271 TYPICAL CHARACTERISTICS 100 125 0 2 Figure 18. Startup Current vs ...
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... EMI test limits. . NCP1271 Operating Conditions There are 5 possible operating conditions for the NCP1271: 1. Normal Operation – When V (9.1 V typical) and the feedback pin voltage (V is within the normal operation range (i.e.,V V), the NCP1271 operates as a fixed-frequency current-mode PWM controller ...
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... The auxiliary winding CC needs to be designed to supply a voltage above the V level but below the maximum V level For added protection, the NCP1271 also include a dual startup mode. Initially, when V CC voltage V (600 mV typical), the startup current source inhibit is small (200 uA typical). The current goes higher (4.1 mA ...
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... Figure 25. V Double Hiccup Operation in a Fault CC Condition V Capacitor CC As stated earlier, the NCP1271 enters a fault condition when the feedback pin is open (i. greater than 3 V) for 130 drops below V CC CC(off) Therefore, to take advantage of these features, the V capacitor needs to be sized so that operation can be maintained in the absence of the auxiliary winding for at least 130 ms ...
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... Soft-Start Operation Figures 28 and 29 show how the soft-start feature is included in the pulse-width modulation comparator. When the NCP1271 starts up, a soft-start voltage V begins increases gradually from 1 4.0 ms and stays at 1.0 V afterward. This voltage V is compared with the divided-by-3 feedback pin ...
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... Oscillator Figure 33. Inserting a Resistor in Series with the Current Sense Information brings Ramp Compensation For the NCP1271, the current ramp features a swing of 100 mA. Over a 65 kHz frequency with an 80% max duty cycle, that corresponds to an 8.1 mA/ms ramp. For a typical flyback design, let's assume that the primary inductance (Lp) is 350 mH, the SMPS output the Vf of the output diode and the Np:Ns ratio is 10:1 ...
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... At this point, a significant portion of the power dissipation is related to the power MOSFET switching on and off. To reduce this power dissipation, the NCP1271 “skips” pulses when the FB level (i.e. duty cycle) drops too low. The level that this occurs at is completely adjustable by setting a resistor on pin 1 ...
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... V TLD V skip ). If Vbulk stays Figure 39. NCP1271 Pin 1 Operating Regions The external latch feature allows the circuit designers to ). Therefore, the implement different kinds of latching protection. The NCP1271 applications note (AND8242/D) details several simple circuits to implement overtemperature protection (OTP) and overvoltage protection (OVP) ...
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... This allows the NCP1271 to drive a high-current power MOSFET directly for medium-high power application. Noise Decoupling Capacitors There are three pins in the NCP1271 that may need external decoupling capacitors. 1. Skip/Latch Pin (Pin 1) – If the voltage on this pin is above 8.0 V, then the circuit enters latchoff ...
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... Hi-pot 3600Vac for 1 sec, primary to secondary Hi-pot 8500Vac for 1 sec, winding to core Figure 42 Example Circuit Using NCP1271 Figure 42 shows a typical application circuit using the NCP1271. The standby power consumption of the circuit with 230 Vac input. The details of the application ...
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... ORDERING INFORMATION Device NCP1271D65R2G NCP1271D100R2G NCP1271P65G NCP1271P100G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. NCP1271 Frequency Package 65 kHz SOIC-7 (Pb-Free) 100 kHz SOIC-7 (Pb-Free) 65 kHz PDIP-7 ...
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... NOTE 2 C -T- N SEATING PLANE 0.13 (0.005 NCP1271 PACKAGE DIMENSIONS 7-LEAD PDIP P SUFFIX CASE 626B-01 ISSUE http://onsemi.com 19 NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. ...
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... B M Soft-Skip is a trademark of Semiconductor Components Industries, LLC (SCILLC). The product described herein (NCP1271), may be covered by the following U.S. patents: 6,271,735, 6,362,067, 6,385,060, 6,597,221, 6,633,193. There may be other patents pending. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein ...