XCF32PFSG48C Xilinx Inc, XCF32PFSG48C Datasheet - Page 17
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XCF32PFSG48C
Manufacturer Part Number
XCF32PFSG48C
Description
IC PROM SRL 1.8V 32M 48CSBGA
Manufacturer
Xilinx Inc
Datasheet
1.XCF01SVOG20C.pdf
(35 pages)
Specifications of XCF32PFSG48C
Memory Size
32Mb
Programmable Type
In System Programmable
Voltage - Supply
1.65 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-BFBGA, CSPBGA
Memory Type
Flash
Supply Voltage Range
1.65V To 2V
Memory Case Style
TFBGA
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Termination Type
SMD
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCF32PFSG48C
Manufacturer:
XILINX
Quantity:
4
Company:
Part Number:
XCF32PFSG48C
Manufacturer:
XILINX
Quantity:
648
Part Number:
XCF32PFSG48C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
DS123 (v2.18) May 19, 2010
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
T
T
T
T
T
T
T
T
T
T
T
T
CYC
LC
HC
SCE
HCE
HOE
SB
HB
SXT
HXT
SRV
HRV
Symbol
AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady-state active levels.
All AC parameters are measured with V
If T
If T
This is the minimum possible T
3.3V, if FPGA data setup time = 15 ns, then the actual T
Guaranteed by design; not tested.
CF, EN_EXT_SEL, REV_SEL[1:0], and BUSY are inputs for the XCFxxP PROM only.
When JTAG CONFIG command is issued, PROM drives CF Low for at least the T
HCE
HOE
High < 2 µs, T
Low < 2 µs, T
R
Clock period
Clock period
Clock period
Clock period
CLK Low time
CLK Low time
CLK High time
CLK High time
CE setup time to CLK (guarantees proper counting)
when V
CE setup time to CLK (guarantees proper counting)
when V
CE hold time (guarantees counters are reset)
when V
CE hold time (guarantees counters are reset)
when V
OE/RESET hold time (guarantees counters are reset)
when V
OE/RESET hold time (guarantees counters are reset)
when V
BUSY setup time to CLK when V
BUSY setup time to CLK when V
BUSY hold time to CLK when V
BUSY hold time to CLK when V
EN_EXT_SEL setup time to CF, CE or OE/RESET
when V
EN_EXT_SEL setup time to CF, CE or OE/RESET
when V
EN_EXT_SEL hold time from CF, CE or OE/RESET
when V
EN_EXT_SEL hold time from CF, CE or OE/RESET
when V
REV_SEL setup time to CF, CE or OE/RESET
when V
REV_SEL setup time to CF, CE or OE/RESET
when V
REV_SEL hold time from CF, CE or OE/RESET
when V
REV_SEL hold time from CF, CE or OE/RESET
when V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
OE
CE
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
(6)
(6)
(6)
(6)
= 2 µs.
= 2 µs.
(3)
(3)
(3)
(3)
(serial mode) when V
(serial mode) when V
(parallel mode) when V
(parallel mode) when V
when V
when V
when V
when V
(8)
(8)
(8)
(8)
CYC
Description
. Actual T
CCO
CCO
CCO
CCO
(8)
(8)
(8)
(8)
IL
= 3.3V or 2.5V
= 1.8V
= 3.3V or 2.5V
= 1.8V
= 0.0V and V
CCO
CCO
CYC
CCO
CCO
= 3.3V or 2.5V
= 1.8V
= T
CCO
CCO
= 3.3V or 2.5V
= 1.8V
CCO
CCO
CAC
= 3.3V or 2.5V
= 1.8V
IH
(8)
CYC
= 3.3V or 2.5V
= 1.8V
+ FPGA Data setup time. Example: With the XCF32P in serial mode with V
(8)
= 3.0V.
(5)
(5)
www.xilinx.com
Platform Flash In-System Programmable Configuration PROMs
= 25 ns +15 ns = 40 ns.
(8)
(3)
(3)
(8)
(6)
(6)
XCF01S, XCF02S,
Min
250
250
250
250
30
67
10
15
10
15
20
30
–
–
–
–
–
–
–
–
–
–
–
–
–
–
HCF
XCF04S
minimum.
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
XCF08P, XCF16P,
2000
2000
2000
2000
Min
300
300
300
300
300
300
300
300
25
25
30
30
12
12
12
12
30
30
12
12
8
8
XCF32P
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Units
CCO
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
at
17