N01L63W2AT25I ON Semiconductor, N01L63W2AT25I Datasheet

IC SRAM 1MBIT 70NS 44TSOP

N01L63W2AT25I

Manufacturer Part Number
N01L63W2AT25I
Description
IC SRAM 1MBIT 70NS 44TSOP
Manufacturer
ON Semiconductor
Type
Asynchronousr
Datasheet

Specifications of N01L63W2AT25I

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
1M (64K x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSOP II
Access Time
30 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Current
2 mA
Organization
64 K x 16
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
766-1031
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 9
1Mb Ultra-Low Power Asynchronous CMOS SRAM
64K × 16 bit
Overview
The N01L63W2A is an integrated memory device
containing a 1 Mbit Static Random Access Memory
organized as 65,536 words by 16 bits. ON
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently and can also be used to
deselect the device. The N01L63W2A is optimal
for various applications where low-power is critical
such as battery backup and hand-held devices.
The device can operate over a very wide
temperature range of -40
available in JEDEC standard packages compatible
with other standard 64Kb x 16 SRAMs.
Product Family
Pin Configuration
A
A
A
A
A
CE1
I/O
I/O
I/O
I/O
VCC
VSS
I/O
I/O
I/O
I/O
WE
A
A
A
A
NC
4
3
2
1
0
15
14
13
12
N01L63W2AB2
0
1
2
3
4
5
6
7
N01L63W2AT2
N01L63W2AB
N01L63W2AT
Part Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PIN
ONE
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
44 - TSOP II Green
A
A
A
OE
UB
LB
I/O
I/O
I/O
I/O
VSS
VCC
I/O
I/O
I/O
I/O
CE2
A
A
A
A
NC
48 - BGA Green
5
6
7
8
9
10
11
Package Type
15
14
13
12
11
10
9
8
44 - TSOP II
48 - BGA
o
C to +85
C
D
G
H
A
B
E
F
I/O
I/O
I/O
I/O
V
V
NC
LB
48 Pin BGA (top)
1
CC
SS
14
15
8
9
I/O
I/O
I/O
I/O
OE
UB
NC
A
6 x 8 mm
2
8
o
10
11
12
13
C and is
NC
NC
A
A
A
A
A
A
3
14
12
0
3
5
9
-40
Temperature
A
A
A
NC
A
A
A
A
4
Operating
15
13
10
1
4
6
7
o
C to +85
CE1
I/O
I/O
I/O
I/O
WE
A
A
5
11
2
1
3
4
5
CE2
I/O
I/O
V
I/O
I/O
V
NC
6
CC
SS
0
2
6
7
o
C 2.3V - 3.6V
Features
• Single Wide Power Supply Range
• Very low standby current
• Very low operating current
• Very low Page Mode operating current
• Simple memory control
• Low voltage data retention
• Very fast output enable access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
• Compact space saving BGA package avail-
Pin Descriptions
Supply
Power
2.3 to 3.6 Volts
2.0µA at 3.0V (Typical)
2.0mA at 3.0V and 1µs (Typical)
0.8mA at 3.0V and 1µs (Typical)
Dual Chip Enables (CE1and CE2)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
Vcc = 1.8V
30ns OE access time
able
(Vcc)
Pin Name
CE1, CE2
I/O
A
V
V
0
WE
0
OE
NC
UB
LB
-A
-I/O
CC
SS
55ns @ 2.7V
70ns @ 2.3V
15
15
Speed
N01L63W2A
Lower Byte Enable Input
Upper Byte Enable Input
(I
Output Enable Input
Data Inputs/Outputs
SB
Write Enable Input
Chip Enable Input
Standby
Current
Address Inputs
Not Connected
), Typical
2 µA
Pin Function
Ground
Power
Publication Order Number:
2 mA @ 1MHz
Current (Icc),
Operating
Typical
N01L63W2A/D

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N01L63W2AT25I Summary of contents

Page 1

... Ultra-Low Power Asynchronous CMOS SRAM 64K × 16 bit Overview The N01L63W2A is an integrated memory device containing a 1 Mbit Static Random Access Memory organized as 65,536 words by 16 bits. ON Semiconductor’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion ...

Page 2

Functional Block Diagram Word Address Address Inputs Decode Logic Page Address Address Inputs Decode A4 - A15 Logic CE1 CE2 Control WE Logic Functional Description CE1 CE2 ...

Page 3

Absolute Maximum Ratings Item Voltage on any pin relative to V Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time 1. Stresses greater than those listed above may cause permanent damage ...

Page 4

Power Savings with Page Mode Operation ( Page Address (A4 - A15) Word Address (A0 - A3) CE1 CE2 OE LB, UB Note: Page mode operation is a method of addressing the SRAM to save operating current. The ...

Page 5

Timing Test Conditions Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature Timing Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output ...

Page 6

Timing of Read Cycle (CE1 = Address Previous Data Valid Data Out Timing Waveform of Read Cycle (WE=V Address CE1 CE2 OE LB LBLZ, High-Z Data Out , WE = CE2 = ...

Page 7

Timing Waveform of Write Cycle (WE control) Address CE1 CE2 LB High-Z Data In Data Out Timing Waveform of Write Cycle (CE1 Control) Address CE1 (for CE2 Control, use inverted signal) LB Data In Data Out ...

Page 8

TSOP II Package (T44) 18.41±0.13 10.16±0.13 0.80mm REF DETAIL B 0.20 0.00 Note: 1. All dimensions in inches (Millimeters) 2. Package dimensions exclude molding flash 11.76±0.20 0.45 0.30 1.10±0.15 0.80mm REF Rev Page ...

Page 9

Ball Grid Array Package D A1 BALL PAD CORNER (3) TOP VIEW K TYP J TYP BOTTOM VIEW Dimensions (mm 6±0.10 8±0.10 0.375 0.28±0.05 1.24±0.10 E SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD ...

Page 10

... Part Number Package N01L63W2AT5I Leaded 44-TSOP II N01L63W2AT25I Green 44-TSOP II (RoHS Compliant) N01L63W2AB5I Leaded 48-BGA N01L63W2AB25I Green 48-BGA (RoHS Compliant) N01L63W2AT5IT Leaded 44-TSOP II N01L63W2AT25IT Green 44-TSOP II (RoHS Compliant) N01L63W2AB5IT Leaded 48-BGA N01L63W2AB25IT Green 48-BGA (RoHS Compliant) Revision History Revision Date A Jan 2001 B ...

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