M95010-RMN6P STMicroelectronics, M95010-RMN6P Datasheet - Page 17
![IC EEPROM 1KBIT 5MHZ 8SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M95010-RMN6P
Manufacturer Part Number
M95010-RMN6P
Description
IC EEPROM 1KBIT 5MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet
1.M95010-WMN6TP.pdf
(43 pages)
Specifications of M95010-RMN6P
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8599-5
M95010-RMN6P
M95010-RMN6P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
M95040, M95020, M95010
6.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
●
●
●
●
●
Figure 8.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion
Write Protect (W) line being held low.
Figure
Write Disable (WRDI) sequence
S
C
D
Q
8, to send this instruction to the device, Chip Select (S) is driven low,
Doc ID 6512 Rev 8
High Impedance
0
1
2
Instruction
3
4
5
6
7
AI03790D
Instructions
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