M95010-RMN6P STMicroelectronics, M95010-RMN6P Datasheet - Page 16
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M95010-RMN6P
Manufacturer Part Number
M95010-RMN6P
Description
IC EEPROM 1KBIT 5MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet
1.M95010-WMN6TP.pdf
(43 pages)
Specifications of M95010-RMN6P
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8599-5
M95010-RMN6P
M95010-RMN6P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Instructions
6
6.1
16/43
Instructions
Each instruction starts with a single-byte code, as summarized in
If an invalid instruction is sent (one not contained in
deselects itself.
Table 4.
1. X = Don’t Care.
2. A8 = 1 for the upper half of the memory array of the M95040, and 0 for the lower half, and is Don’t Care for
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven
high.
Figure 7.
WREN
WRDI
RDSR
WRSR
READ
WRITE
other devices.
Instruction
Instruction set
Figure
Write Enable (WREN) sequence
S
C
D
Q
7, to send this instruction to the device, Chip Select (S) is driven low,
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
Doc ID 6512 Rev 8
Description
High Impedance
0
1
2
Instruction
3
4
5
Table
6
7
4), the device automatically
M95040, M95020, M95010
AI01441D
Table
Instruction Format
0000 A
0000 A
0000 X110
0000 X100
0000 X101
0000 X001
4.
8
8
011
010
(1)
(1)
(1)
(1)
(2)
(2)