CY62157DV30L-55BVXET Cypress Semiconductor Corp, CY62157DV30L-55BVXET Datasheet
CY62157DV30L-55BVXET
Specifications of CY62157DV30L-55BVXET
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CY62157DV30L-55BVXET Summary of contents
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... A 0 Note: 1. For best practice recommendations, please refer to the Cypress application note entitled System Design Guidelines, which is available at http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05392 Rev. *H 8-Mbit (512K x 16) MoBL Functional Description The CY62157DV30 is a high-performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ ...
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... Product Portfolio Product Range CY62157DV30L Industrial CY62157DV30LL Industrial CY62157DV30LL Automotive-A CY62157DV30L Automotive-E [ Pin Configuration A15 1 A14 2 A13 3 A12 4 A11 5 A10 DNU CE2 12 DNU 13 BHE 14 BLE 15 A18 16 A17 48-Ball FBGA Pinout Top View BLE I BHE CE I I/O I/O I/O I Vcc A V I/O ...
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... FBGA and 48TSOPI packages and on the BHE pin of the 44TSOPII package is 15 pF. 2 Document #: 38-05392 Rev. *H Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-up Current...................................................... >200 mA Operating Range Device CY62157DV30L + 0.3V CC(max) CY62157DV30LL + 0.3V CY62157DV30LL Automotive-A –40°C to +85°C CC(max) + 0.3V CY62157DV30L CC(max) Test Conditions V = 2.20V 2.70V ...
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Thermal Resistance Parameter Description Θ Thermal Resistance JA (Junction to Ambient) Θ Thermal Resistance JC (Junction to Case) AC Test Loads and Waveforms OUTPUT INCLUDING JIG AND SCOPE Parameters R1 R2 ...
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... HZCE HZBE HZWE 19. The internal Write time of the memory is defined by the overlap of WE write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05392 Rev. *H ...
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Switching Waveforms Read Cycle 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [21, 22] Read Cycle 2 (OE Controlled) ADDRESS ACE BHE/BLE t LZBE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE ...
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Switching Waveforms (continued) [19, 23, 24, 25] Write Cycle 1 (WE Controlled) ADDRESS BHE/BLE OE DATA I/O See note 25 t HZOE Write Cycle 2 ( Controlled ADDRESS CE ...
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Switching Waveforms (continued) Write Cycle 3 (WE Controlled, OE LOW) ADDRESS BHE/BLE DATA I/O See note 25 t HZWE Write Cycle 4 (BHE/BLE Controlled, OE LOW) ADDRESS BHE/BLE t ...
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Truth Table BHE ...
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... Ordering Information Speed Ordering Code (ns) 45 CY62157DV30L-45BVI CY62157DV30LL-45ZSXI 55 CY62157DV30LL-55BVI CY62157DV30L-55BVXI CY62157DV30LL-55BVXI CY62157DV30L-55ZXI CY62157DV30LL-55ZSI CY62157DV30L-55ZSXI CY62157DV30LL-55ZSXI CY62157DV30LL-55BVXA CY62157DV30L-55BVXE CY62157DV30L-55ZSXE 70 CY62157DV30LL-70BVI CY62157DV30LL-70BVXI Package Diagrams TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05392 Rev. *H Package Package Type Diagram 51-85150 48-ball ( mm) FBGA 51-85087 44-pin TSOP II (Pb-free) ...
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... Document #: 38-05392 Rev. *H © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...
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... Added Pb-Free Automotive Part in the Ordering Information Removed ‘Preliminary’ tag from Automotive Information ZSD Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Updated the thermal resistance table Updated the ordering information table and changed the package name ...