M95320-WMN6P STMicroelectronics, M95320-WMN6P Datasheet - Page 9

• Manufacturer Part Number: M95320-WMN6P
• Description: IC EEPROM 32KBIT 10MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95320-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 32K (4K x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 4096 X 8
• Interface Type: Serial, SPI
• Clock Frequency: 10MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8611-5; M95320-WMN6P

OPERATING FEATURES
Power-Up
When the power supply is turned on, V
from V
During this time, the Chip Select (S) must be al-
lowed to follow the V
lowed to float, but should be connected to V
a suitable pull-up resistor.
As a built in safety feature, Chip Select (S) is edge
sensitive as well as level sensitive. After Power-
up, the device does not become selected until a
falling edge has first been detected on Chip Select
(S). This ensures that Chip Select (S) must have
been High, prior to going Low to start the first op-
eration.
Power On Reset: V
In order to prevent inadvertent Write operations
during Power-up, each device include a Power On
Reset (POR) circuit. At Power-up, the device will
not respond to any instruction until V
reached the Power On Reset threshold voltage.
This threshold is lower than the V
voltage defined in Tables 10, 11,
Similarly, as soon as V
operating voltage, below the Power On Reset
threshold voltage, the device stops responding to
any instruction sent to it.
Prior to selecting and issuing instructions to the
memory, a valid stable V
plied. This voltage must remain stable and valid
until the end of the transmission of the instruction
and, for a Write instruction, until the completion o
the internal write cycle (t
Power-down
At Power-down, the device must be deselected.
Chip Select (S) should be allowed to follow the
voltage applied on V
SS
to V
CC
.
CC
CC
CC
.
Lock-Out Write Protect
CC
voltage. It must not be al-
W
CC
).
drops from the normal
voltage must be ap-
CC
12
min operating
and 13.
CC
CC
CC
rises
has
via
Active Power and Standby Power Modes
When Chip Select (S) is Low, the device is select-
ed, and in the Active Power mode. The device
consumes I
20..
When Chip Select (S) is High, the device is dese-
lected. If an Erase/Write cycle is not currently in
progress, the device then goes in to the Standby
Power mode, and the device consumption drops
to I
Hold Condition
The Hold (HOLD) signal is used to pause any se-
rial communications with the device without reset-
ting the clocking sequence.
During the Hold condition, the Serial Data Output
(Q) is high impedance, and Serial Data Input (D)
and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be
selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole
duration of the Hold condition. Deselecting the de-
vice while it is in the Hold condition, has the effect
of resetting the state of the device, and this mech-
anism can be used if it is required to reset any pro-
cesses that had been in progress.
The Hold condition starts when the Hold (HOLD)
signal is driven Low at the same time as Serial
Clock (C) already being Low (as shown in
6.).
The Hold condition ends when the Hold (HOLD)
signal is driven High at the same time as Serial
Clock (C) already being Low.
Figure 6.
and falling edges are not timed to coincide with
Serial Clock (C) being Low.
CC1
.
also shows what happens if the rising
CC
, as specified in
M95640, M95320
Table 16.
to
Figure
Table
9/42