M29F800DB70N6 NUMONYX, M29F800DB70N6 Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/4/484/numonyx_sml.jpg)
M29F800DB70N6
Manufacturer Part Number
M29F800DB70N6
Description
IC FLASH 8MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Datasheet
1.M29F800DB70N6.pdf
(53 pages)
Specifications of M29F800DB70N6
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
8M (1M x 8 or 512K x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1710
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M29F800DB70N6
Manufacturer:
ST
Quantity:
1 760
Company:
Part Number:
M29F800DB70N6
Manufacturer:
ST
Quantity:
2 000
M29F800DT
2.0.8
2.0.9
2.0.10
2.0.11
2.0.12
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all Blocks that have been protected.
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
least t
ready for Bus Read and Bus Write operations after t
See
AC
more details.
Holding RP at V
and Erase operations on all blocks will be possible. The transition from V
slower than t
Ready/Busy output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the device is
performing a Program or Erase operation. During Program or Erase operations Ready/Busy
is Low, V
Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
characteristics, and
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
Byte/Word Organization Select (BYTE)
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V
bit mode, when it is High, V
V
The V
The Command Interface is disabled when the V
voltage, V
during power up, power down and power surges. If the Program/Erase Controller is
programming or erasing during this time then the operation aborts and the memory contents
being altered will be invalid.
A 0.1µF capacitor should be connected between the V
Ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during program and erase operations, I
V
The V
CC
SS
characteristics, and
Section 2.0.9: Ready/Busy output
Ground
Supply Voltage
PLPX
CC
SS
OL
Ground is the reference for all voltage measurements.
Supply Voltage supplies the power for all operations (Read, Program, Erase etc.).
LKO
. After Reset/Block Temporary Unprotect goes High, V
. Ready/Busy is high-impedance during Read mode, Auto Select mode and
PHPHH
. This prevents Bus Write operations from accidentally damaging the data
ID
will temporarily unprotect the protected Blocks in the memory. Program
.
Figure 13: Reset/Block Temporary Unprotect AC
Figure 13: Reset/Block Temporary Unprotect AC waveforms
IH
, the memory is in 16-bit mode.
Table 15: Reset/Block Temporary Unprotect AC
(RB),
Table 15: Reset/Block Temporary Unprotect
CC
Supply Voltage is less than the Lockout
PHEL
CC
or t
Supply Voltage pin and the V
RHEL
IH
, whichever occurs last.
, the memory will be
waveforms.
IL
Signal descriptions
, the memory is in 8-
IH
to V
ID
must be
IL
for
, for at
13/53
SS
CC3
.