RC28F256K3C120 NUMONYX, RC28F256K3C120 Datasheet - Page 46

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RC28F256K3C120

Manufacturer Part Number
RC28F256K3C120
Description
IC FLASH 256MBIT 120NS 64BGA
Manufacturer
NUMONYX
Datasheet

Specifications of RC28F256K3C120

Rohs Status
RoHS non-compliant
Format - Memory
FLASH
Memory Type
StrataFlash® FLASH
Memory Size
256M (16Mx16)
Speed
120ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-BGA
Other names
853157

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Part Number
Manufacturer
Quantity
Price
Part Number:
RC28F256K3C120
Manufacturer:
INTEL
Quantity:
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Part Number:
RC28F256K3C120
Manufacturer:
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Quantity:
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28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
11.3
46
buffer is available; if not set, the write buffer is not available. To retry, issue the Write-to-Buffer
Setup command again, and re-check SR7. When SR7 is set, the write buffer is available. See
25, “Write to Buffer Flowchart” on page
Next, a word count (actual word count - 1) is written to the device at the buffer address. This tells
the device how many data words will be written to the write buffer, up to the maximum size of the
write buffer. The valid range of values for word count is 0x00 to 0x1F.
On the next write, a device start address is given along with the first data to be written to the flash
memory array. Subsequent writes provide additional device addresses and data. All data addresses
must lie within the start address plus the word count. Maximum programming performance and
lower power are obtained by aligning the starting address at the beginning of a 32 word boundary.
A misaligned starting address will result in a doubling of the total program time.
After the last data is written to the write buffer, the Write-to-Buffer Confirm command is issued.
The Write State Machine begins to copy the write buffer contents to the flash memory array. If a
command other than the Write-to-Buffer Confirm command is written to the device, a command
sequence error will occur and Status Register bits SR4, SR5 and SR7 will be set. If an error occurs
while writing to the array, the device will stop programming, and Status Register bit SR4 and SR7
will be set, indicating a programming failure.
Additional buffer writes can be initiated by issuing another Write-to-Buffer Setup command and
repeating the write-to-buffer sequence.
Anytime SR4 and SR5 are set, the device will not accept Write-to-Buffer commands. If an attempt
is made to program past a block boundary using the Write-to-Buffer command, the device will
abort the operation. This will generate a command sequence error, and Status Register bits SR4 and
SR5 will be set.
If Write-Buffer Programming is attempted while V
and SR4 will be set. If any errors are detected that have set Status Register bits, the Status Register
should be cleared using the Clear Status Register command.
Program Suspend
To execute a program suspend, execute the Program Suspend command. A suspend operation halts
any in-progress programming operation. The Suspend command can be written to any device
address. A Suspend command allows data to be accessed from any memory location other than
those suspended.
A program operation can be suspended to perform a device read. A program operation nested
within an erase suspend operation can be suspended to read the flash device. Once the program
process starts, a suspend operation can only occur at certain points in the program algorithm. Erase
suspend operations cannot resume until program operations initiated during the erase suspend are
complete. All device read functions are permitted during a suspend operation.
During a suspend, V
minimum amount of time is required between issuing a Program or Erase command and then
issuing a Suspend command.
PEN
must remain at a valid program level and WP# must not change. Also, a
70.
PEN
is below V
PENLK
, Status Register bits SR3
Datasheet
Figure

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