IS42S16100C1-7TL ISSI, Integrated Silicon Solution Inc, IS42S16100C1-7TL Datasheet - Page 15
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IS42S16100C1-7TL
Manufacturer Part Number
IS42S16100C1-7TL
Description
IC SDRAM 16MBIT 143MHZ 50TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS42S16100C1-7TL.pdf
(81 pages)
Specifications of IS42S16100C1-7TL
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
16M (1M x 16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
50-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1016
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S16100C1-7TL
Manufacturer:
ISSI
Quantity:
33
Part Number:
IS42S16100C1-7TL
Manufacturer:
ISSI
Quantity:
20 000
Company:
Part Number:
IS42S16100C1-7TLI
Manufacturer:
ROHM
Quantity:
9 123
Part Number:
IS42S16100C1-7TLI
Manufacturer:
ISSI
Quantity:
20 000
IS42S16100C1
Integrated Silicon Solution, Inc. — www.issi.com
Rev. F
08/24/09
OPERATION COMMAND TABLE
Current State Command
Idle
Row Active
Read
Write
Read With
Auto-
Precharge
DESL
NOP
BST
READ / READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
Operation
No Operation or Power-Down
No Operation or Power-Down
No Operation or Power-Down
Illegal
Illegal
Row Active
No Operation
Auto-Refresh or Self-Refresh
Mode Register Set
No Operation
No Operation
No Operation
Read Start
Write Start
Illegal
Precharge
Illegal
Illegal
Burst Read Continues, Row Active When Done
Burst Read Continues, Row Active When Done
Burst Interrupted, Row Active After Interrupt
Burst Interrupted, Read Restart After Interrupt
Burst Interrupted Write Start After Interrupt
Illegal
Burst Read Interrupted, Precharge After Interrupt
Illegal
Illegal
Burst Write Continues, Write Recovery When Done
Burst Write Continues, Write Recovery When Done
Burst Write Interrupted, Row Active After Interrupt
Burst Write Interrupted, Read Start After Interrupt
Burst Write Interrupted, Write Restart After Interrupt
Illegal
Burst Write Interrupted, Precharge After Interrupt
Illegal
Illegal
Burst Read Continues, Precharge When Done
Burst Read Continues, Precharge When Done
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
(10)
(10)
(10)
(10)
(10)
(1,2)
(15)
(17)
(17)
(13)
(12)
(12)
(11,16)
(16)
(11,16)
(16)
CS RAS CAS WE A11 A10 A9-A0
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
X
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
OP CODE
OP CODE
OP CODE
OP CODE
OP CODE
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
X
X
X
V
V
V
V
X
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
(18)
15