MT45W1MW16BDGB-701 WT TR Micron Technology Inc, MT45W1MW16BDGB-701 WT TR Datasheet - Page 43
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MT45W1MW16BDGB-701 WT TR
Manufacturer Part Number
MT45W1MW16BDGB-701 WT TR
Description
IC PSRAM 16MBIT 70NS 54VFBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W1MW16BDGB-708_AT_TR.pdf
(59 pages)
Specifications of MT45W1MW16BDGB-701 WT TR
Format - Memory
RAM
Memory Type
PSRAM (Page)
Memory Size
16M (1M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-30°C ~ 85°C
Package / Case
54-VFBGA
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1209-2
MT45W1MW16BDGB-701 WT TR
MT45W1MW16BDGB-701 WT TR
Figure 33:
PDF: 09005aef81cb58ed/Source: 09005aef81c7a667
16mb_burst_cr1_0_p23z_2.fm - Rev. H 4/08 EN
DQ[15:0]
LB#/UB#
A[19:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OH
OL
OL
IH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
Continuous Burst READ Showing an Output Delay with BCR[8] = 0 for End-of-Row
Condition
Notes:
t CLK
OUTPUT
1. Non-default BCR settings for continuous burst READ showing an output delay, BCR[8] = 0
2. WAIT will be asserted a maximum of (2 × LC) cycles (BCR[8] = 0; WAIT asserted during delay).
3. CE# must not remain LOW longer than
VALID
for end-of-row condition: Latency code two (three clocks); WAIT active LOW; WAIT asserted
during delay.
LC = latency code (BCR[13:11]).
16Mb: 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
t KHTL
OUTPUT
VALID
43
Note 3
Note 2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CEM.
t KHTL
t ACLK
OUTPUT
VALID
©2005 Micron Technology, Inc. All rights reserved.
OUTPUT
Timing Diagrams
VALID
t KOH
DON’T CARE