AT49SV322DT-80TU Atmel, AT49SV322DT-80TU Datasheet - Page 5

• Manufacturer Part Number: AT49SV322DT-80TU
• Description: IC FLASH 32MBIT 80NS 48TSOP
• Manufacturer: Atmel

Specifications of AT49SV322DT-80TU

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 32M (2M x 16)
• Speed: 80ns
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.6
4.7
4.7.1
4.7.2
3623A–FLASH–7/06
VPP Pin
Program/Erase Status
Data Polling
Toggle Bit
The circuitry of the AT49SV322D(T) is designed so that the device cannot be programmed or
erased if the V
and erase operations can be performed. The VPP pin cannot be left floating.
The device provides several bits to determine the status of a program or erase operation: I/O2,
I/O3, I/O5, I/O6 and I/O7. The
describe the function of these bits. To provide greater flexibility for system designers, the
AT49SV322D(T) contains a programmable configuration register. The configuration register
allows the user to specify the status bit operation. The configuration register can be set to one
of two different values, “00” or “01”. If the configuration register is set to “00”, the part will auto-
matically return to the read mode after a successful program or erase operation. If the
configuration register is set to a “01”, a Product ID Exit command must be given after a suc-
cessful program or erase operation before the part will return to the read mode. It is important
to note that whether the configuration register is set to a “00” or to a “01”, any unsuccessful
program or erase operation requires using the Product ID Exit command to return the device
to read mode. The default value (after power-up) for the configuration register is “00”. Using
the four-bus cycle Set Configuration Register command as shown in the
Table” on page
the RESET pin will not alter the value of the configuration register. The value of the configura-
tion register will affect the operation of the I/O7 status bit as described below.
The AT49SV322D(T) features Data Polling to indicate the end of a program cycle. If the status
configuration register is set to a “00”, during a program cycle an attempted read of the last
word loaded will result in the complement of the loaded data on I/O7. Once the program cycle
has been completed, true data is valid on all outputs and the next cycle may begin. During a
chip or sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the
program or erase cycle has completed, true data will be read from the device. Data Polling
may begin at any time during the program cycle. Please see
more details.
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has com-
pleted a program or erase operation. Once I/O7 has gone high, status information on the other
pins can be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
bit as shown in the algorithm in
In addition to Data Polling the AT49SV322D(T) provides another method for determining the
end of a program or erase cycle. During a program or erase operation, successive attempts to
read data from the memory will result in I/O6 toggling between one and zero. Once the pro-
gram cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the
toggle bit may begin at any time during a program cycle. Please see
page 11
The toggle bit status bit should be used in conjunction with the erase/program and V
bit as shown in the algorithm in
for more details.
PP
12, the value of the configuration register can be changed. Voltages applied to
voltage is less that 0.4V. When V
“Status Bit Table” on page 11
Figures 4-1 and 4-2
Figures 4-3 and 4-4
on
on
PP
is at 1.65V or above, normal program
page
page
“Status Bit Table” on page 11
9.
10.
and the following four sections
AT49SV322D(T)
“Status Bit Table” on
“Command Definition
PP
PP
status
status
for
5