AT45DB642-TI Atmel, AT45DB642-TI Datasheet - Page 9

• Manufacturer Part Number: AT45DB642-TI
• Description: IC FLASH 64MBIT 20MHZ 40TSOP
• Manufacturer: Atmel

Specifications of AT45DB642-TI

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (8192 pages x 1056 bytes)
• Speed: 20MHz Serial/5MHz Parallel
• Interface: Parallel/Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Operation Mode
Summary
1638F–DFLSH–09/02
MAIN MEMORY PAGE TO BUFFER COMPARE: A page of data in main memory can be
compared to the data in buffer 1 or buffer 2. To initiate the operation, a 1-byte opcode, 60H for
buffer 1 and 61H for buffer 2, must be clocked into the device, followed by three address bytes
consisting of 13 page address bits (PA12 - PA0) that specify the page in the main memory that
is to be compared to the buffer, and 11 don’t care bits. The CS pin must be low while toggling
the SCK/CLK pin to load the opcode and the address bytes from the input pins (SI or I/O7 -
page will be compared with the 1056 bytes in buffer 1 or buffer 2. During this time (t
status register and the RDY/BUSY pin will indicate that the part is busy. On completion of the
compare operation, bit 6 of the status register is updated with the result of the compare.
AUTO PAGE REWRITE: This mode is only needed if multiple bytes within a page or multiple
pages of data are modified in a random fashion. This mode is a combination of two operations:
Main Memory Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in
Erase. A page of data is first transferred from the main memory to buffer 1 or buffer 2, and
then the same data (from buffer 1 or buffer 2) is programmed back into its original page of
main memory. To start the rewrite operation, a 1-byte opcode, 58H for buffer 1 or 59H for
buffer 2, must be clocked into the device, followed by three address bytes comprised of 13
page address bits (PA12 - PA0) that specify the page in main memory to be rewritten and 11
don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first transfer
data from the page in main memory to a buffer and then program the data from the buffer back
into same page of main memory. The operation is internally self-timed and should take place
in a maximum time of t
cate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming
algorithm shown in Figure 1 (page 33) is recommended. Otherwise, if multiple bytes in a page
or several pages are programmed randomly in a sector, then the programming algorithm
shown in Figure 2 (page 34) is recommended. Each page within a sector must be
updated/rewritten at least once within every 10,000 cumulative page erase/program opera-
tions in that sector.
The modes described can be separated into two groups – modes that make use of the Flash
memory array (Group A) and modes that do not make use of the Flash memory array
(Group B).
Group A modes consist of:
1. Main Memory Page to Buffer 1 (or 2) Transfer
2. Main Memory Page to Buffer 1 (or 2) Compare
3. Buffer 1 (or 2) to Main Memory Page Program with Built-in Erase
4. Buffer 1 (or 2) to Main Memory Page Program without Built-in Erase
5. Page Erase
6. Block Erase
7. Main Memory Page Program through Buffer
8. Auto Page Rewrite
9. Group B modes consist of:
10. Buffer 1 (or 2) Read
11. Buffer 1 (or 2) Write
12. Status Register Read
If a Group A mode is in progress (not fully completed), then another mode in Group A should
not be started. However, during this time in which a Group A mode is in progress, modes in
Group B can be started.
I/O0). On the low-to-high transition of the CS pin, the 1056 bytes in the selected main memory
EP
. During this time, the status register and the RDY/BUSY pin will indi-
AT45DB642
XFR
), the
9