AT45DB081B-TC-2.5 Atmel, AT45DB081B-TC-2.5 Datasheet - Page 6
![IC FLASH 8MBIT 20MHZ 28TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
AT45DB081B-TC-2.5
Manufacturer Part Number
AT45DB081B-TC-2.5
Description
IC FLASH 8MBIT 20MHZ 28TSOP
Manufacturer
Atmel
Datasheet
1.AT45DB081B-CC.pdf
(33 pages)
Specifications of AT45DB081B-TC-2.5
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
8M (4096 pages x 264 bytes)
Speed
20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6
AT45DB081B
Successive page programming operations without doing a page erase are not recommended. In
other words, changing bytes within a page from a “1” to a “0” during multiple page programming
operations without erasing that page is not recommended.
PAGE ERASE: The optional Page Erase command can be used to individually erase any page
in the main memory array allowing the Buffer to Main Memory Page Program without Built-in
Erase command to be utilized at a later time. To perform a Page Erase, an opcode of 81H must
be loaded into the device, followed by three reserved bits, 12 address bits (PA11 - PA0), and
nine don’t care bits. The 12 address bits are used to specify which page of the memory array is
to be erased. When a low-to-high transition occurs on the CS pin, the part will erase the selected
page to 1s. The erase operation is internally self-timed and should take place in a maximum time
of t
BLOCK ERASE: A block of eight pages can be erased at one time allowing the Buffer to Main
Memory Page Program without Built-in Erase command to be utilized to reduce programming
times when writing large amounts of data to the device. To perform a Block Erase, an opcode of
50H must be loaded into the device, followed by three reserved bits, nine address bits (PA11 -
pages is to be erased. When a low-to-high transition occurs on the CS pin, the part will erase the
selected block of eight pages to 1s. The erase operation is internally self-timed and should take
place in a maximum time of t
busy.
Block Erase Addressing
MAIN MEMORY PAGE PROGRAM THROUGH BUFFER: This operation is a combination of the
Buffer Write and Buffer to Main Memory Page Program with Built-in Erase operations. Data is
first shifted into buffer 1 or buffer 2 from the SI pin and then programmed into a specified page in
the main memory. To initiate the operation, an 8-bit opcode, 82H for buffer 1 or 85H for buffer 2,
must be followed by the three reserved bits and 21 address bits. The 12 most significant address
bits (PA11 - PA0) select the page in the main memory where data is to be written, and the next
nine address bits (BFA8 - BFA0) select the first byte in the buffer to be written. After all address
bits are shifted in, the part will take data from the SI pin and store it in one of the data buffers. If
the end of the buffer is reached, the device will wrap around back to the beginning of the buffer.
When there is a low-to-high transition on the CS pin, the part will first erase the selected page in
main memory to all 1s and then program the data stored in the buffer into the specified page in
the main memory. Both the erase and the programming of the page are internally self-timed and
PA3), and 12 don’t care bits. The nine address bits are used to specify which block of eight
PA11
PE
0
0
0
0
1
1
1
1
•
•
•
. During this time, the status register will indicate that the part is busy.
PA10
0
0
0
0
1
1
1
1
•
•
•
PA9
0
0
0
0
1
1
1
1
•
•
•
PA8
0
0
0
0
1
1
1
1
•
•
•
PA7
BE
0
0
0
0
1
1
1
1
•
•
•
. During this time, the status register will indicate that the part is
PA6
0
0
0
0
1
1
1
1
•
•
•
PA5
0
0
0
0
1
1
1
1
•
•
•
PA4
0
0
1
1
0
0
1
1
•
•
•
PA3
0
1
0
1
0
1
0
1
•
•
•
PA2
X
X
X
X
X
X
X
X
•
•
•
PA1
X
X
X
X
X
X
X
X
•
•
•
PA0
X
X
X
X
X
X
X
X
•
•
•
2225J–DFLSH–2/08
Block
508
509
510
511
0
1
2
3
•
•
•