AT28C040-20BI Atmel, AT28C040-20BI Datasheet
AT28C040-20BI
Specifications of AT28C040-20BI
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AT28C040-20BI Summary of contents
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... JEDEC Approved Byte-Wide Pinout Description The AT28C040 is a high-performance electrically erasable and programmable read only memory (EEPROM). Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation of just 440 mW. ...
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... The AT28C040 is accessed like a static RAM for the read or write cycle without the need for external components. The device contains a 256-byte page register to allow writ- ing 256 bytes simultaneously. During a write cycle, the address and 1 to 256 bytes of data are internally latched, freeing the address and data bus for other opera- tions ...
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... It should be BLC noted that once protected, the host can still perform a byte or page write to the AT28C040 so, the same 3-byte command sequence used to enable SDP must precede the data to be written. Once set, SDP will remain active unless the disable com- mand sequence is issued ...
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... ( Condition MHz OUT -400 -100 4. AT28C040-25 Operation Read Program 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -55°C - 125°C -40°C - 85°C 5V 10% 5V 10 OUT High High Z Min Max Units 0.8 V 2.0 V 0.45 V 2.4 V 4.2 V ...
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... C 8 OUT Note: 1. This parameter is characterized and is not 100% tested after the address transition wihtout impact on t ACC after the falling edge of CE without impact pF). L Output Test Load Max 10 12 AT28C040-20 AT28C040-25 Min Max Min Max 200 250 200 250 ...
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... AC Write Characteristics Symbol Parameter Address, OE Set-up Time AS OES t Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Set-up Time Data, OE Hold Time DH OEH AC Write Waveforms WE Controlled CE Controlled AT28C040 6 Min Max Units 100 ...
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Page Mode Characteristics Symbol Parameter t Write Cycle Time WC t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Byte Load Cycle Time ...
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... After the command sequence has been issued and a page write operation follows, the page address inputs (A8 - A18) must be the same for each high to low transition of WE (or CE must be high only when WE and CE are both low. AT28C040 8 Software Data (1) Protection Disable Algorithm ...
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Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See AC ...
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... Non-Windowed, Ceramic Leadless Chip Carrier (LCC) Blank Standard Device: Endurance = 10K Write Cycles; Write Time = 10 ms AT28C040 10 Ordering Code AT28C040-20BC AT28C040-20FC AT28C040-20LC AT28C040-20BI AT28C040-20FI AT28C040-20LI AT28C040-20BI SL703 AT28C040-20FI SL703 AT28C040-20LI SL703 AT28C040-25BC AT28C040-25FC AT28C040-25LC AT28C040-25BI AT28C040-25FI AT28C040-25LI AT28C040-25BI SL703 AT28C040-25FI SL703 AT28C040-25LI SL703 ...
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Packaging Information 32B, 32-Lead, 0.600" Wide, Ceramic Side Braze Dual Inline (Side Braze) Dimensions in Inches and (Millimeters) 44L, 44-Pad, Non-Windowed, Ceramic Leadless Chip Carrier (LCC) Dimensions in Inches and (Millimeters)* MIL-STD-1835 C-5 *Ceramic lid standard unless specified. 32F, 32-Lead, ...
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... No licenses to patents or other intellectual prop Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...