AT28C040-20 ATMEL Corporation, AT28C040-20 Datasheet
AT28C040-20
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AT28C040-20 Summary of contents
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... CMOS and TTL Compatible Inputs and Outputs • JEDEC Approved Byte-Wide Pinout Description The AT28C040 is a high-performance electrically erasable and programmable read 2 only memory (E PROM). Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel's advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation of just 440 mW ...
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... The AT28C040 is accessed like a static RAM for the read or write cycle without the need for external components. The device contains a 256-byte page register to allow writ- ing 256 bytes simultaneously. During a write cycle, the address and 1 to 256 bytes of data are internally latched, freeing the address and data bus for other opera- tions ...
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... It should be BLC noted that once protected, the host can still perform a byte or page write to the AT28C040 so, the same 3-byte command sequence used to enable SDP must precede the data to be written. Once set, SDP will remain active unless the disable com- mand sequence is issued ...
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... Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH1 V Output High Voltage CMOS OH2 AT28C040 4 AT28C040-20 Operation Read Program 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -55°C - 125°C -40°C - 85°C 5V 10 ...
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... ACC after the falling edge of CE without impact pF). L Output Test Load Typ Max AT28C040-20 AT28C040-25 Min Max Min Max 200 250 200 250 ...
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... Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Set-up Time Data, OE Hold Time DH OEH AC Write Waveforms WE Controlled CE Controlled AT28C040 6 Min Max Units 100 ...
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Page Mode Characteristics Symbol Parameter t Write Cycle Time WC t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Byte Load Cycle Time ...
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... After the command sequence has been issued and a page write operation follows, the page address inputs (A8 - A18) must be the same for each high to low transition of WE (or CE must be high only when WE and CE are both low. AT28C040 8 Software Data (1) Protection Disable Algorithm ...
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Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See AC ...
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... Note: 1. See Valid Part Numbers on next page. AT28C040 10 Ordering Code AT28C040-20BC AT28C040-20FC AT28C040-20LC AT28C040-20BI AT28C040-20FI AT28C040-20LI AT28C040-20BI SL703 AT28C040-20FI SL703 AT28C040-20LI SL703 AT28C040-25BC AT28C040-25FC AT28C040-25LC AT28C040-25BI AT28C040-25FI AT28C040-25LI AT28C040-25BI SL703 AT28C040-25FI SL703 AT28C040-25LI SL703 Package Operation Range 32B Commercial ...
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... Valid Part Numbers The following table lists standard Atmel products that can be ordered. Device Numbers Speed AT28C040 20 AT28C040 25 32B 32-Lead, 0.600" Wide, Ceramic Side Braze Dual Inline (Side Braze) 32F 32-Lead, Non-Windowed, Ceramic Bottom-Brazed Flat Package (Flatpack) 44L 44-Pad, Non-Windowed, Ceramic Leadless Chip Carrier (LCC) Blank Standard Device: Endurance = 10K Write Cycles ...
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... Dimensions in Inches and (Millimeters) 44L, 44-Pad, Non-Windowed, Ceramic Leadless Chip Carrier (LCC) Dimensions in Inches and (Millimeters)* MIL-STD-1835 C-5 *Ceramic lid standard unless specified. AT28C040 12 32F, 32-Lead, Non-Windowed, Ceramic Bottom- Brazed Flat Package (Flatpack) Dimension in Inches and (Millimeters) JEDEC OUTLINE MO-115 PIN #1 ID ...