M29W320ET70N6F NUMONYX, M29W320ET70N6F Datasheet - Page 23

• Manufacturer Part Number: M29W320ET70N6F
• Description: IC FLASH 32MBIT 70NS 48TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of M29W320ET70N6F

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 32M (4Mx8, 2Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5
4.5.1
4.5.2
Fast Program commands
There are two Fast Program commands available to improve the programming throughput,
by writing several adjacent words or bytes in parallel. The Quadruple byte Program
command is available for x8 operations, while the Double word Program command is
available for x16 operations.
Fast Program commands should not be attempted when V
be taken because applying a 12V V
any protected block.
After programming has started, Bus Read operations output the Status register content.
After the program operation has completed the memory will return to the Read mode, unless
an error has occurred. When an error occurs Bus Read operations will continue to output
the Status register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the
Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’
to ’1’.
Typical Program times are given in
Endurance cycles
Quadruple byte Program command
The Quadruple byte Program command is used to write a page of four adjacent bytes in
parallel. The four bytes must differ only for addresses A0, DQ15A-1. Five bus write cycles
are necessary to issue the Quadruple byte Program command.
1.
2.
3.
4.
5.
Double word Program command
The Double word Program command is used to write a page of two adjacent words in
parallel. The two words must differ only for the address A0.
Three bus write cycles are necessary to issue the Double word Program command.
1.
2.
3.
The first bus cycle sets up the Quadruple byte Program command.
The second bus cycle latches the Address and the Data of the first byte to be written.
The third bus cycle latches the Address and the Data of the second byte to be written.
The fourth bus cycle latches the Address and the Data of the third byte to be written.
The fifth bus cycle latches the Address and the Data of the fourth byte to be written and
starts the Program/Erase Controller.
The first bus cycle sets up the Double word Program command.
The second bus cycle latches the Address and the Data of the first word to be written.
The third bus cycle latches the Address and the Data of the second word to be written
and starts the Program/Erase Controller.
Table 6: Program, Erase times and Program, Erase
PP
voltage to the VPP/WP pin will temporarily unprotect
PP/
WP is not at V
PP
. Care must
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