M29W320ET70N6F NUMONYX, M29W320ET70N6F Datasheet
M29W320ET70N6F
Specifications of M29W320ET70N6F
Related parts for M29W320ET70N6F
M29W320ET70N6F Summary of contents
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... Program/Erase cycles per block Electronic signature – Manufacturer code: 0020h – Top Device code M29W320ET: 2256h – Bottom Device code M29W320EB: 2257h ® RoHS packages available May 2009 M29W320ET M29W320EB 3V supply Flash memory TSOP48 ( FBGA TFBGA48 (ZE Rev 9 BGA FBGA64 (ZS 1/65 1 www.numonyx.com ...
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Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Erase Timer bit (DQ3 5.5 Alternative Toggle bit (DQ2 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Appendix A Block Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Appendix B Common Flash Interface (CFI Appendix C Extended memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.1 Factory Locked Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9.2 Customer Lockable Extended Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 3/65 ...
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Appendix D Block Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... The memory is offered in TSOP48 (12x20mm), and TFBGA48 (6x8mm, 0.8mm pitch) packages. In order to meet environmental requirements, Numonyx offers the M29W320E in RoHS packages, which are are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97 ...
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Figure 1. Logic diagram Table 1. Signal names A0-A20 DQ0-DQ7 DQ8-DQ14 DQ15A– BYTE / 8/ / A0-A20 W M29W320ET E M29W320EB G ...
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Figure 2. TSOP connections V PP /WP A15 1 48 A14 A13 A12 A11 A10 A9 A8 A19 M29W320ET A20 M29W320EB A18 A17 ...
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Figure 3. TFBGA48 connections (top view through package 10/ A17 A2 A6 A18 ...
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Figure 4. FBGA64 connections (top view through package ...
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Figure 5. Block Addresses (x8) Top Boot Block (x8) Address lines A20-A0, DQ15A-1 000000h 64 KByte or 32 KWord 00FFFFh 2F0000h 64 KByte or 32 KWord 2FFFFFh 300000h 64 KByte or 32 KWord 30FFFFh 3E0000h 64 KByte or 32 KWord ...
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Figure 6. Block Addresses (x16) Top Boot Block (x16) Address lines A20-A0 000000h 64 KByte or 32 KWord 007FFFh 178000h 64 KByte or 32 KWord 17FFFFh 180000h 64 KByte or 32 KWord 187FFFh 1F0000h 64 KByte or 32 KWord 1F7FFFh ...
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... Figure 1: Logic connected to this device. 2.1 Address Inputs (A0-A20) The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command interface of the Program/Erase Controller. 2.2 Data Inputs/Outputs (DQ0-DQ7) The Data I/O outputs the data stored at the selected address during a Bus Read operation ...
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... Write Enable (W) The Write Enable, W, controls the Bus Write operation of the memory’s Command interface. 2.8 V Write Protect (V PP/ The V /Write Protect pin provides two functions. The V PP use an external high voltage power supply to reduce the time required for Program operations ...
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... This prevents Bus Write operations from accidentally damaging the data LKO during power up, power down and power surges. If the Program/Erase Controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1μF capacitor should be connected between the V Ground pin to decouple the current surges from the power supply ...
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... Write, Output Disable, Standby and Automatic Standby. See and Table 2 Table on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. 3.1 Bus Read Bus Read operations read from the memory cells, or specific registers in the Command interface. A valid Bus Read operation involves setting the desired address on the Address ...
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... They require V applied to some pins. 3.6.1 Electronic signature The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in and 3, Bus operations. ...
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... Table 2. Bus operations, BYTE = V Operation E G Bus Read Bus Write Output Disable Standby Read Manufacturer code Read Device code Extended memory Block Verify code (1) IL Address Inputs W DQ15A–1, A0-A20 V Cell Address IH V Command Address Others Others Others Data Inputs/Outputs DQ14- ...
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... Table 3. Bus operations, BYTE = V Operation E G Bus Read Bus Write Output Disable Standby Read Manufacturer code Read Device code Extended memory Block Verify code 20/65 (1) IH Address Inputs W A0-A20 V Cell Address IH V Command Address Others Others Others Data Inputs/Outputs DQ15A–1, DQ14-DQ0 ...
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... If the Read/Reset command is issued during the time-out of a Block erase operation then the memory will take up to 10μs to abort. During the abort period no valid data can be read from the memory. The Read/Reset command will not abort an Erase operation when issued while in Erase Suspend ...
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... Status register. A Read/Reset command must be issued to reset the error condition and return to Read mode. Note that the Program command cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. 22/65 (CFI), ...
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... Read mode. Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. Typical Program times are given in Endurance cycles 4 ...
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... Status register for more details. After the Chip Erase operation has completed the memory will return to the Read mode, unless an error has occurred. When an error occurs the memory will continue to output the 24/65 /Write Protect pin the memory automatically enters the ...
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... Status register. A Read/Reset command must be issued to reset the error condition and return to Read mode. The Chip Erase Command sets all of the bits in unprotected blocks of the memory to ’1’. All previous data is lost. 4.10 Block Erase command The Block Erase command can be used to erase a list of one or more blocks. It sets all of the bits in the unprotected selected blocks to ’ ...
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... Extended Block. The Extended Block (with the same address as the boot block) cannot be erased, and can be treated as one-time programmable (OTP) memory. In Extended Block mode the Boot Blocks are not accessible. To exit from the Extended Block mode the Exit Extended Block command must be issued. ...
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Table 4. Commands, 16-bit mode, BYTE = V Command Addr Data Addr Data 1 X Read/Reset 3 555 Auto Select 3 555 Program 4 555 Double word Program 3 555 Unlock Bypass 3 555 Unlock Bypass 2 X Program Unlock ...
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Table 5. Commands, 8-bit mode, BYTE = V Command Add 1 X Read/Reset 3 AAA Auto Select 3 AAA Program 4 AAA Quadruple byte Program 5 AAA Unlock Bypass 3 AAA Unlock Bypass Program 2 X Unlock Bypass Reset 2 ...
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Table 6. Program, Erase times and Program, Erase Endurance cycles Parameter Chip Erase Block Erase (64 Kbytes) Erase Suspend Latency time Program (byte or word) Double word Program (byte or word) Chip Program (byte by byte) Chip Program (word by ...
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... DQ7, not its complement. During Erase operations the Data Polling bit outputs ’0’, the complement of the erased state of DQ7. After successful completion of the Erase operation the memory returns to Read mode. In Erase Suspend mode the Data Polling bit will output a ’1’ during a Bus Read operation within a block being erased. The Data Polling bit will change from a ’ ...
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... Error bit is set to ’1’ when a Program, Block Erase or Chip Erase operation fails to write the correct data to the memory. If the Error bit is set a Read/Reset command must be issued before other commands are issued. The Error bit is output on DQ5 when the Status register is read. Note that the Program command cannot change a bit set to ’ ...
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Table 7. Status register bits Operation Program Program during Erase Suspend Program Error Chip Erase Block Erase before timeout Block Erase Erase Suspend Erase Error 1. Unspecified data bits should be ignored. 32/65 (1) Address DQ7 DQ6 Any Address DQ7 ...
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Figure 7. Data Polling flowchart START READ DQ5 & DQ7 at VALID ADDRESS DQ7 YES = DATA NO NO DQ5 = 1 YES READ DQ7 at VALID ADDRESS DQ7 YES = DATA NO FAIL PASS AI90194 33/65 ...
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Figure 8. Toggle flowchart Address of Block being Programmed or Erased. 34/65 START READ DQ6 ADDRESS = BA READ DQ5 & DQ6 ADDRESS = BA DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Refer also to the Numonyx SURE Program and other relevant quality documents. ...
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DC and ac parameters This section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. The parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement ...
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Table 10. Device capacitance Symbol Parameter C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 11. DC characteristics Symbol Parameter I Input Leakage current LI I Output Leakage current LO (1) I Supply current ...
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Figure 11. Read mode ac waveforms A0-A20/ A– DQ0-DQ7/ DQ8-DQ15 BYTE tELBL/tELBH Table 12. Read ac characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC ...
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Figure 12. Write ac waveforms, Write Enable controlled A0-A20/ A–1 E tELWL G tGHWL W DQ0-DQ7/ DQ8-DQ15 V CC tVCHEL RB Table 13. Write ac characteristics, Write Enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...
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Figure 13. Write ac waveforms, Chip Enable controlled A0-A20/ A–1 W tWLEL G tGHEL E DQ0-DQ7/ DQ8-DQ15 V CC tVCHWL RB Table 14. Write ac characteristics, Chip Enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...
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Figure 14. Toggle and alternative Toggle bits mechanism, Chip Enable controlled A0-A20 VALID ADDRESS E G Data (1) (2) DQ2 /DQ6 1. The Toggle bit is output on DQ6. 2. The alternative Toggle bit is output on DQ2. Figure 15. ...
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Figure 16. Reset/Block Temporary Unprotect ac waveforms tPLPX RP Table 16. Reset/Block Temporary Unprotect ac characteristics Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable t t PHEL RH Low, Output Enable ...
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Package mechanical Figure 18. TSOP48 Lead Plastic Thin Small Outline, 12x20 mm package outline, top view DIE 1. Drawing not to scale. Table 17. TSOP48 Lead Plastic Thin Small Outline, 12x20 mm, package mechanical data millimeters ...
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Figure 19. TFBGA48 6x8mm-6x8 Ball Array, 0.8mm Pitch, package outline, bottom view FD FE BALL "A1" Drawing not to scale. Table 18. TFBGA48 6x8mm - 6x8 Ball Array, 0.8mm Pitch, package mechanical data millimeters Symbol Typ A ...
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Figure 20. FBGA64 active ball array pitch, package outline, bottom view BALL "A1" Drawing is not to scale. Table 19. FBGA64 ...
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... Numonyx sales office. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you. 46/65 M29W320EB ...
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Appendix A Block Addresses Table 21. Top Boot Block Addresses, M29W320ET Block size Block (Kbytes/Kwords) 0 64/32 1 64/32 2 64/32 3 64/32 4 64/32 5 64/32 6 64/32 7 64/32 8 64/32 9 64/32 10 64/32 11 64/32 12 ...
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Table 21. Top Boot Block Addresses, M29W320ET (continued) Block size Block (Kbytes/Kwords) 28 64/32 29 64/32 30 64/32 31 64/32 32 64/32 33 64/32 34 64/32 35 64/32 36 64/32 37 64/32 38 64/32 39 64/32 40 64/32 41 64/32 ...
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Table 21. Top Boot Block Addresses, M29W320ET (continued) Block size Protection Block Block (Kbytes/Kwords) 60 64/32 61 64/32 Protection group 62 64/32 63 8/4 Protection group 64 8/4 Protection group 65 8/4 Protection group 66 8/4 Protection group 67 8/4 ...
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Table 22. Bottom Boot Block Addresses, M29W320EB (continued) Block size Block (Kbytes/Kwords) 19 64/32 20 64/32 21 64/32 22 64/32 23 64/32 24 64/32 25 64/32 26 64/32 27 64/32 28 64/32 29 64/32 30 64/32 31 64/32 32 64/32 ...
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Table 22. Bottom Boot Block Addresses, M29W320EB (continued) Block size Protection Block Block (Kbytes/Kwords) 51 64/32 52 64/32 Protection group 53 64/32 54 64/32 55 64/32 56 64/32 Protection group 57 64/32 58 64/32 59 64/32 60 64/32 Protection group ...
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... The CFI data structure also contains a security area where a 64 bit unique security number is written (see area). This area can be accessed only in Read mode by the final user Table 28: Security code impossible to change the security number after it has been written by Numonyx. Table 23. Query Structure Overview Address ...
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Table 25. CFI Query System Interface Information Address Data x16 x8 1Bh 36h 0027h 1Ch 38h 0036h 1Dh 3Ah 00B5h 1Eh 3Ch 00C5h 1Fh 3Eh 0004h 20h 40h 0000h 21h 42h 000Ah 22h 44h 0000h 23h 46h 0004h 24h 48h ...
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Table 26. Device Geometry Definition Address Data x16 x8 27h 4Eh 0016h 28h 50h 0002h 29h 52h 0000h 2Ah 54h 0000h 2Bh 56h 0000h 2Ch 58h 0002h 2Dh 5Ah 0007h 2Eh 5Ch 0000h 2Fh 5Eh 0020h 30h 60h 0000h 31h ...
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Table 27. Primary Algorithm-specific extended Query table (continued) Address Data x16 x8 4Ah 94h 0000h 4Bh 96h 0000h 4Ch 98h 0000h 4Dh 9Ah 00B5h 4Eh 9Ch 00C5h 0002h 4Fh 9Eh 0003h Table 28. Security code area Address Data x16 x8 ...
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... Bit DQ7 is the most significant bit in the Extended Block Verify code and a specific procedure must be followed to read it. See “Extended memory Block Verify code” in and Section Table 3. on page operations, BYTE = V The Extended Block can only be accessed when the device is in Extended Block mode ...
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Once the Extended Block is programmed and protected, the Exit Extended Block command must be issued to exit the Extended Block mode and return the device to Read mode. Table 29. Extended Block Address and data Device x8 3F0000h-3F000Fh M29W320ET ...
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... Appendix D Block Protection Block protection can be used to prevent any operation from modifying the data stored in the memory. The blocks are protected in groups, refer to and Table 21 Table Erase operations within the protected group fail to change the data. There are three techniques that can be used to control Block Protection, these are the Programmer technique, the In-system technique and Temporary Unprotection. Temporary Unprotection is controlled by the Reset/Block Temporary Unprotection pin, RP ...
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Table 30. Programmer technique Bus operations, BYTE = V Operation E G Block (group ( Protect Chip Unprotect Block (group Protection Verify Block (group ...
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Figure 21. Programmer Equipment Group Protect flowchart 1. Block Protection groups are shown in 60/65 START ADDRESS = GROUP ADDRESS Wait 4µs W ...
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Figure 22. Programmer Equipment Chip Unprotect flowchart NO ++n = 1000 FAIL 1. Block Protection groups are shown in START PROTECT ALL GROUPS CURRENT GROUP = 0 A6, ...
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Figure 23. In-system Equipment Group Protect flowchart 1. Block Protection groups are shown can be either when using the In-system technique to protect the Extended Block 62/65 START n = ...
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Figure 24. In-system Equipment Chip Unprotect flowchart ++ 1000 ISSUE READ/RESET COMMAND FAIL 1. Block Protection groups are shown in START PROTECT ALL GROUPS CURRENT GROUP = ...
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... RoHS text added. Changed DQ7 to DQ7 for ‘Program’, ‘Program during Erase Suspend’, 5 and ‘Program Error’ in Table 7: Status register 6 Applied Numonyx branding. 7 Added FBGA (ZS) package information. 8 Added FBGA64 8x8 ballout. Specified top and bottom boot data for addresses 4Fh and 9Eh in 27 ...
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... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...