MT46H64M16LFCK-5 IT:A TR Micron Technology Inc, MT46H64M16LFCK-5 IT:A TR Datasheet - Page 37

IC DDR SDRAM 1GBIT 60VFBGA

MT46H64M16LFCK-5 IT:A TR

Manufacturer Part Number
MT46H64M16LFCK-5 IT:A TR
Description
IC DDR SDRAM 1GBIT 60VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46H64M16LFCK-5 IT:A TR

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
1G (64M x 16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 12: PRECHARGE Command
BURST TERMINATE
AUTO REFRESH
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. K 07/09 EN
Note:
BA0, BA1
The BURST TERMINATE command is used to truncate READ bursts with auto pre-
charge disabled. The most recently registered READ command prior to the BURST
TERMINATE command will be truncated, as described in READ Operation (page 57).
The open page from which the READ was terminated remains open.
AUTO REFRESH is used during normal operation of the device and is analogous to CAS#-
BEFORE-RAS# (CBR) REFRESH in FPM/EDO DRAM. The AUTO REFRESH command is
nonpersistent and must be issued each time a refresh is required.
Addressing is generated by the internal refresh controller. This makes the address bits a
“Don’t Care” during an AUTO REFRESH command.
For improved efficiency in scheduling and switching between tasks, some flexibility in
the absolute refresh interval is provided. The auto refresh period begins when the AU-
TO REFRESH command is registered and ends
Address
1. If A10 is HIGH, bank address becomes “Don’t Care.”
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
Single bank
All banks
Bank
Don’t Care
37
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
RFC later.
©2007 Micron Technology, Inc. All rights reserved.
Commands

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