IS62WV102416BLL-25TLI-TR ISSI, Integrated Silicon Solution Inc, IS62WV102416BLL-25TLI-TR Datasheet - Page 11

• Manufacturer Part Number: IS62WV102416BLL-25TLI-TR
• Description: IC SRAM 16MBIT 25NS 48TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS62WV102416BLL-25TLI-TR

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 16M (1M x 16)
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS62WV102416ALL
IS62WV102416BLL
IS65WV102416BLL
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to V
2. The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4. t
AC WAVEFORMS
WRITE CYCLE NO. 1
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at least one of the LB and UB inputs
2. WRITE = (CS1) [ (LB) = (UB) ] (WE).
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
01/18/08
Symbol
t
t
t
t
t
t
t
t
t
t
t
output loading specified in Figure 1.
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the
write.
being in the LOW state.
PWE
WC
AW
HA
PWB
SD
HD
HZWE
SCS1/
SA
PWE
LZWE
> t
(4)
(3)
t
(3)
HZWE
SCS2
+ t
Parameter
Write Cycle Time
CS1/CS2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
LB, UB Valid to End of Write
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
SD
ADDRESS
when OE is LOW.
LB, UB
DOUT
CS1
CS2
DIN
WE
(1,2)
(CS1 Controlled, OE = HIGH or LOW)
t
DATA UNDEFINED
SA
Min.
t
AW
25
18
15
18
18
12
—
0
0
0
5
t
HZWE
25ns
t
t
SCS2
SCS1
Max.
t
t
t
PWB
—
—
—
—
—
—
—
—
—
12
—
PWE
WC
(1,2)
HIGH-Z
(Over Operating Range)
t
SD
Min.
DATA-IN VALID
35
25
25
25
30
15
—
0
0
0
5
35 ns
Max.
—
—
—
—
—
—
—
—
—
20
—
t
HA
t
t
LZWE
HD
DD
-0.2V/0.4V to V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DD
-0.3V and
11