IS61WV102416BLL-10TLI-TR ISSI, Integrated Silicon Solution Inc, IS61WV102416BLL-10TLI-TR Datasheet - Page 12

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IS61WV102416BLL-10TLI-TR

Manufacturer Part Number
IS61WV102416BLL-10TLI-TR
Description
IC SRAM 16MBIT 10NS 48TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61WV102416BLL-10TLI-TR

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
16M (1M x 16)
Speed
10ns
Interface
Parallel
Voltage - Supply
2.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS61WV102416ALL
IS61WV102416BLL
IS64WV102416BLL
WRITE CYCLE SWITCHING CHARACTERISTICS
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any
12
Symbol
Notes:
specified in Figure 1.
one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that
terminates the write. Shaded area product in development
t
t
t
t
t
t
t
t
t
t
t
t
WC
HD
SCE
AW
HA
SA
PWB
PWE
PWE
SD
HZWE
LZWE
1
2
(2)
(2)
Parameter
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
LB, UB Valid to End of Write
WE Pulse Width
WE Pulse Width (OE = LOW)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
Integrated Silicon Solution, Inc. — www.issi.com —
Min.
6.5
6.5
6.5
6.5
8.0
8
0
0
5
0
2
-8
Max.
3.5
(1,3)
(Over Operating Range)
Min.
10
10
8
8
0
0
8
8
6
0
2
-10
Max.
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1-800-379-4774
06/05/09
Rev. E

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