IS42S32800B-7T ISSI, Integrated Silicon Solution Inc, IS42S32800B-7T Datasheet - Page 21

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IS42S32800B-7T

Manufacturer Part Number
IS42S32800B-7T
Description
IC SDRAM 256MBIT 143MHZ 86TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheet

Specifications of IS42S32800B-7T

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (8Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOPII
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Quantity
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IS42S32800B
Integrated Silicon Solution, Inc.
Rev. F
07/21/09
D.C. Electrical Characteristics (Recommended Operating Conditions)
Parameter
Operating Current
t
signal one transition per one cycle
Precharge Standby Current in power down mode
Precharge Standby Current in power down mode
Precharge Standby Current in non-power down mode
Precharge Standby Current in non-power down mode
Active Standby Current in power down mode
Active Standby Current in power down mode
Active Standby Current in non-power down mode
Active Standby Current in non-power down mode
Operating Current (Burst mode)
t
Refresh Current
Self Refresh Current
RC
CK
t
t
t
CK
CK
t
CK
Input signals are changed once during 30ns.
C KE V
CKE& CLK V
CKE V
CKE V
t
C KE 0.2V
V
V
CK
RC
I
=t
I
OL
IL
OH
OL
= , CLK V
= , CKE V
= 15ns, CS# V
t
CK
= 15ns, CKE V
RC
t
(min),
(min), Outputs Open, Input
RC
(min)
IH
IH
IL
(0V V
(min), CS# V
(min), CLK V
Description/Test condition
(max), t
Outputs Open, Multi-bank interleave
IL
IL
IL
(max), t
(max), CKE V
IN
(max)
CK
IH
(0V V
LVTTL Output "H" Level Voltage
LVTTL Output "L" Level Voltage
IL
(min), CKE V
= 15ns
(max)
V
DD
Output Leakage Current
CK
Input Leakage Current
IH
IL
, All other pins not under test = 0V )
(max), t
(min), t
=
OUT
( I
( I
Description
OUT
OUT
IH
V
CK
CK
= -2mA )
= 2mA )
DD
IH
= 15ns
=
, DQ disable )
1 bank
operation
Symbol
I
I
I
I
I
I
CC2NS
I
I
CC3NS
CC2PS
CC3PS
I
CC2N
CC3N
I
I
I
CC2P
CC3P
CC1
CC4
CC5
CC6
- 1.5
Min.
- 1
2.4
1
135/125
180/150
300/270
- 6/7
Max.
20
9
3
45
30
4
3
2
1.5
Max.
+ 1.5
+ 1
0.4
Unit
Unit
m A
µA
µA
V
V
Note
Note
3, 4
3
3
3
3
3
3
21

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