IS61LV12824-10B ISSI, Integrated Silicon Solution Inc, IS61LV12824-10B Datasheet - Page 10

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IS61LV12824-10B

Manufacturer Part Number
IS61LV12824-10B
Description
IC SRAM 3MBIT 10NS 119BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61LV12824-10B

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
3M (128K x 24)
Speed
10ns
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
119-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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IS61LV12824
10
WRITE CYCLE NO. 3
ADDRESS
Note:
1. The internal Write time is defined by the overlap of CE1 and CE2 = LOW, CE2 = HIGH and WE = LOW. All signals must be
in valid states to initiate a Write, but any can be deasserted to terminate the Write. The Data Input Setup and Hold timing is
referenced to the rising or falling edge of the signal that terminates the Write.
D
CE1
CE2
OUT
WE
D
OE
IN
LOW
LOW
HIGH
t
DATA UNDEFINED
SA
(1)
(WE Controlled: OE
t
t
I S
AW
HZWE
LOW
VALID ADDRESS
DURING
t
t
PWE2
WC
Integrated Silicon Solution, Inc. — 1-800-379-4774
W
HIGH-Z
RITE
t
C
SD
YLE
DATA
)
IN
VALID
t
HD
t
LZWE
t
HA
ISSI
CE2_WR3.eps
06/22/05
Rev. D
®

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