MT46H8M16LFBF-5:K TR Micron Technology Inc, MT46H8M16LFBF-5:K TR Datasheet - Page 57
MT46H8M16LFBF-5:K TR
Manufacturer Part Number
MT46H8M16LFBF-5:K TR
Description
IC DDR SDRAM 128MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H4M32LFB5-5_ITK.pdf
(94 pages)
Specifications of MT46H8M16LFBF-5:K TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (8Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
60-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (4Mb)
Bank/Row Activation
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
Before any READ or WRITE commands can be issued to a bank within the device, a row
in that bank must be opened. This is accomplished via the ACTIVE command, which
selects both the bank and the row to be activated (see Figure 9 (page 35)). After a row is
opened with the ACTIVE command, a READ or WRITE command can be issued to that
row, subject to the
A subsequent ACTIVE command to a different row in the same bank can only be issued
after the previous active row has been precharged. The minimum time interval between
successive ACTIVE commands to the same bank is defined by
A subsequent ACTIVE command to another bank can be issued while the first bank is
being accessed, which results in a reduction of total row access overhead. The mini-
mum time interval between successive ACTIVE commands to different banks is defined
by
t
RRD.
t
RCD specification.
57
128Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank/Row Activation
© 2007 Micron Technology, Inc. All rights reserved.
t
RC.
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