AMIS30585GEVK ON Semiconductor, AMIS30585GEVK Datasheet - Page 4

• Manufacturer Part Number: AMIS30585GEVK
• Description: Power Management IC Development Tools EVK PLC MODEM 1200 BAUD
• Manufacturer: ON Semiconductor
• Type: Supervisory Circuitsr

Specifications of AMIS30585GEVK

• Rohs: yes
• Product: Evaluation Kits
• Tool Is For Evaluation Of: AMIS-30585
• Input Voltage: 3 V to 3.6 V
• Output Voltage: 0.3 V

Pin 1: VSSA
recommended putting a decoupling capacitance between
this pin and the VDDA pin. This capacitance value is:
100 nF ±10 percent ceramic. Connection path of the
capacitance to the VSSA and VDDA on the PCB should be
kept as short as possible in order to minimize the serial
resistance.
Pin 2: RX_OUT
noise input op−amp. This op−amp is in a negative feedback
configuration. To know how to use this pin, refer to the
explanations given for pin RX_IN.
P:
A:
D:
5 V Safe:
Table 1. AMIS−30585 PIN FUNCTIONS
VSSA is the analog ground supply pin. It is strongly
RX_OUT is the output analog pin of the receiver low
No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Power pin
Analog pin
Digital pin
IO that support the presence of 5 V on bus line
M50HZ_IN
REF_OUT
TX_DATA
RX_OUT
TX_ENB
TX_OUT
ALC_IN
TRSTB
RX_IN
Name
VSSA
XOUT
RESB
VDDA
TEST
TDO
TMS
VDD
RXD
TCK
VSS
TXD
BR1
BR0
10O
TDI
XIN
IO2
IO1
In/Out
In/Out
In/Out
Out
Out
Out
Out
Out
Out
Out
Out
I/O
In
In
In
In
In
In
In
In
In
In
In
In
In
Out:
In:
In/Out:
Output signal
Input signal
Bi−directional pin
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
D, 5 V Safe
Type
P
A
A
A
A
A
A
P
P
D
A
A
P
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Analog ground
Output of input stage opamp
Positive input of input stage opamp
Reference output for stabilization
50.60 Hz input
Programmable IO pin (open drain)
Test data output
Test data output (internal pull down)
Test clock (internal pull down)
Test mode select (internal pull down)
Test reset bar (internal pull down, active low)
Data output corresponding to transmitted frequency
Xtal input (can be driven by an internal clock)
Xtal output (output floating when XIN driven by external clock)
Digital ground
3.3 V digital supply
SCI transmit output (open drain)
SCI receive input (Schmitt trigger output)
Programmable IO pin + interrupt (open drain)
SCI baud rate selection
SCI baud rate selection
Programmable IO pin (open drain)
Master reset bar (Schmitt trigger input, active low)
Test enable (internal pull down)
TX enable bar (open drain)
Transmitter output
Automatic level control input
3.3 V analog supply
4
Pin 3: RX_IN
noise input op−amp. Together with the pins two and three,
an active high pass filter is realized. This filter removes the
main frequency (50 or 60 Hz) from the received signal. The
filter characteristics are determined by external capacitors
and resistors. Typical values are given in Table 2. For these
values and after this filter, a typical attenuation of 80 dB at
50 or 60 Hz is obtained. Table 2 represents external
components connection. The present construction supposes
the presence of a previous formed with the coupling
transformer and a parallel capacitance is placed on the
mains. This last one performs a typical attenuation of 60 dB.
The combined effect of the two filters decreases the voltage
level of the main frequency well below the sensitivity of the
AMIS−30585.
RX_IN is the positive analog input pin of the receiver low
Description