IS42S16800D-7TLI ISSI, Integrated Silicon Solution Inc, IS42S16800D-7TLI Datasheet - Page 47
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IS42S16800D-7TLI
Manufacturer Part Number
IS42S16800D-7TLI
Description
IC SDRAM 128MBIT 143MHZ 54TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheet
1.IS42S16800D-7TL.pdf
(62 pages)
Specifications of IS42S16800D-7TLI
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (8Mx16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-TSOP II
Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
6.5/5.4ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
130mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S16800D-7TLI
Manufacturer:
ISSI
Quantity:
1 000
Part Number:
IS42S16800D-7TLI
Manufacturer:
ISSI
Quantity:
20 000
IS42S81600D,
PRECHARGE
The PRECHARGE command (see figure) is used to deac-
tivate the open row in a particular bank or the open row in all
banks. The bank(s) will be available for a subsequent row
access some specified time (t
command is issued. Input A10 determines whether one or
all banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA0, BA1 select the
bank. When all banks are to be precharged, inputs BA0,
BA1 are treated as “Don’t Care.” Once a bank has been
precharged, it is in the idle state and must be activated prior
to any READ or WRITE commands being issued to that
bank.
POWER-DOWN
Power-down occurs if CKE is registered LOW coincident
with a NOP or COMMAND INHIBIT when no accesses are
in progress. If power-down occurs when all banks are idle,
this mode is referred to as precharge power-down; if power-
down occurs when there is a row active in either bank, this
mode is referred to as active power-down. Entering power-
down deactivates the input and output buffers, excluding
CKE, for maximum power savings while in standby. The
device may not remain in the power-down state longer than
the refresh period (64ms) since no refresh operations are
performed in this mode.
The power-down state is exited by registering a NOP or
COMMAND INHIBIT and CKE HIGH at the desired clock
edge (meeting t
POWER-DOWN
Integrated Silicon Solution, Inc. — www.issi.com
Rev. E
07/28/08
CKS
). See figure below.
COMMAND
IS42S16800D
CKE
CLK
All banks idle
Enter power-down mode
RP
) after the PRECHARGE
t
NOP
CKS
Input buffers gated off
less than 64ms
PRECHARGE Command
Exit power-down mode
BA0, BA1
A0-A9, A11
CKE
RAS
CAS
CLK
A10
WE
CS
t
CKS
HIGH
NOP
DON'T CARE
BANK ADDRESS
BANK SELECT
ACTIVE
ALL BANKS
t
t
t
RCD
RAS
RC
47