IS42S32200E-7TLI ISSI, Integrated Silicon Solution Inc, IS42S32200E-7TLI Datasheet - Page 34

IC SDRAM 64MBIT 143MHZ 86TSOP

IS42S32200E-7TLI

Manufacturer Part Number
IS42S32200E-7TLI
Description
IC SDRAM 64MBIT 143MHZ 86TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheets

Specifications of IS42S32200E-7TLI

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Package / Case
86-TSOPII
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
8/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Data Bus Width
32 bit
Maximum Clock Frequency
143 MHz
Access Time
5.5 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
140 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1082
IS42S32200E-7TLI

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IS42S32200E
DC ELECTRICAL CHARACTERISTICS
Notes:
1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time
2. Icc
34
Symbol
I
I
V
V
I
I
I
I
I
I
I
I
OL
IL
CC1
CC2P
CC2PS
CC3P
CC3PS
CC4
CC5
CC6
O H
OL
increases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between V
chip to suppress power supply voltage noise (voltage drops) due to these transient currents.
1
and Icc
Parameter
Input Leakage Current
Output Leakage Current
Output High Voltage Level
Output Low Voltage Level
Operating Current
Precharge Standby Current
(In Power-Down Mode)
Active Standby Current
(In Power-Down Mode)
Operating Current
(In Burst Mode)
Auto-Refresh Current
Self-Refresh Current
4
depend on the output load. The maximum values for Icc
(1)
(1,2)
Test Condition
0V V
the tested pin at 0V
Output is disabled, 0V V
I
I
One Bank Operation,
Burst Length=1
t
I
CKE V
CKE V
t
I
BL = 4; 4 banks activated
t
t
CKE 0.2V
OUT
OUT
RC
OUT
CK
OUT
RC
CLK
= t
= t
= 0mA
= 0mA
= t
= –2 mA
= +2 mA
t
RC
IN
CK
RC
CLK
(min.)
IL
IL
(
(
V
(
(
MIN
MIN
(
MIN
MAX
MAX
DD
Integrated Silicon Solution, Inc. — www.issi.com —
)
)
(Recommended Operation Conditions unless otherwise noted.)
)
, with pins other than
)
)
OUT
CAS latency = 3
CAS latency = 3
CAS latency = 3
V
DD
t
t
t
t
1
CK
CK
CK
CK
and Icc
=
=
= 15ns
= 10ns
4
are obtained with the output open state.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Speed
-5
-6
-7
-7
-5
-6
-7
-7
-5
-6
-7
-7
DD
and GND for each memory
Min.
2.4
–5
–5
1-800-379-4774
Max.
130
145
180
130
100
110
150
150
130
150
0.4
95
85
5
5
2
4
1
3
7
7
5
5
1
Rev. 00D
06/02/08
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
V
V

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