ADP322CP-EVALZ Analog Devices, ADP322CP-EVALZ Datasheet - Page 17

• Manufacturer Part Number: ADP322CP-EVALZ
• Description: Power Management IC Development Tools 200mA LDO Evaluation Board
• Manufacturer: Analog Devices
• Type: Linear Regulators - Standardr
• Series: ADP322r

Specifications of ADP322CP-EVALZ

• Rohs: yes
• Tool Is For Evaluation Of: ADP322
• Input Voltage: 5.5 V
• Output Current: 200 mA
• Factory Pack Quantity: 1

Data Sheet
Use Equation 1 to determine the worst-case capacitance,
accounting for capacitor variation over temperature, compo-
nent tolerance, and voltage.
where:
C
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, TEMPCO over −40°C to +85°C is assumed
to be 15% for an X5R dielectric. TOL is assumed to be 10%,
and C
Substituting these values into Equation 1 yields
Therefore, the capacitor chosen in this example meets the mini-
mum capacitance requirement of the LDO over temperature
and tolerance at the chosen output voltage.
To guarantee the performance of the ADP322/ADP323 triple
LDO, it is imperative that the effects of dc bias, temperature,
and tolerances on the behavior of the capacitors be evaluated
for each application.
UNDERVOLTAGE LOCKOUT
The ADP322/ADP323 have an internal undervoltage lockout
circuit that disables all inputs and the output when the input
voltage bias, VBIAS, is less than approximately 2.2 V. This
ensures that the inputs of the ADP322/ADP323 and the output
behave in a predictable manner during power-up.
ENABLE FEATURE
The ADP322/ADP323 use the ENx pins to enable and disable
the VOUTx pins under normal operating conditions. Figure 48
shows that, when a rising voltage on ENx crosses the active
threshold, VOUTx turns on. When a falling voltage on ENx
crosses the inactive threshold, VOUTx turns off.
BIAS
C
C
is the effective capacitance at the operating voltage.
BIAS
EFF
EFF
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.4
is 0.94 μF at 1.8 V (from the graph in Figure 47).
= C
= 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
BIAS
0.5
× (1 − TEMPCO) × (1 − TOL)
Figure 48. Typical ENx Pin Operation
0.6
ENABLE VOLTAGE (V)
0.7
0.8
0.9
V
OUT
1.0
@ 4.5V
IN
1.1
1.2
Rev. A | Page 17 of 24
(1)
As shown in Figure 48, the ENx pin has built-in hysteresis. This
prevents on/off oscillations that can occur due to noise on the
ENx pin as it passes through the threshold points.
The active/inactive thresholds of the ENx pin are derived
from the V
changing input voltage. Figure 49 shows typical ENx active/
inactive thresholds when the input voltage varies from 2.5 V
to 5.5 V (note that V
The ADP322/ADP323 use an internal soft start to limit the
inrush current when the output is enabled. The start-up time
for the 2.8 V option is approximately 220 μs from the time the
ENx active threshold is crossed to when the output reaches 90%
of its final value. The start-up time is somewhat dependent on
the output voltage setting and increases slightly as the output
voltage increases.
CH1 = V
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
1
2
Figure 50. Typical Start-Up Time,I
CH1 1V
CH3
2.5
Figure 49. Typical ENx Pins Thresholds vs. Input Voltage
ENx
BIAS
500mV
(the Enable Voltage), CH2 = V
V
ENx
voltage. Therefore, these thresholds vary with
V
ENx
3.0
B
B
W
W
RISE
ENx
CH2
CH4 500mV
is the enable voltage).
3.5
INPUT VOLTAGE (V)
500mV
B
B
4.0
W
W
LOAD1
M100µs A CH1
T
OUT1
= I
ADP322/ADP323
10.2%
V
V
V
LOAD2
, CH3 = V
4.5
OUT1
OUT2
OUT3
= I
V
LOAD3
ENx
OUT2
5.0
FALL
= 100 mA,
, CH4 = V
540mV
5.5
OUT3