ADP322CP-EVALZ Analog Devices, ADP322CP-EVALZ Datasheet - Page 15

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ADP322CP-EVALZ

Manufacturer Part Number
ADP322CP-EVALZ
Description
Power Management IC Development Tools 200mA LDO Evaluation Board
Manufacturer
Analog Devices
Type
Linear Regulators - Standardr
Series
ADP322r
Datasheet

Specifications of ADP322CP-EVALZ

Rohs
yes
Tool Is For Evaluation Of
ADP322
Input Voltage
5.5 V
Output Current
200 mA
Factory Pack Quantity
1
Data Sheet
THEORY OF OPERATION
The ADP322/ADP323 triple LDO are low quiescent current, low
dropout linear regulators that operate from 1.8 V to 5.5 V on
VIN1/VIN2 and VIN3 and provide up to 200 mA of current from
each output. Drawing a low 250 μA quiescent current (typical) at
full load makes the ADP322/ADP323 ideal for battery-operated
portable equipment. Shutdown current consumption is typically
100 nA. Optimized for use with small 1 μF ceramic capacitors,
the ADP322/ADP323 provide excellent transient performance.
Internally, the ADP322 consists of a reference, three error ampli-
fiers, three feedback voltage dividers, and three PMOS pass
transistors. Output current is delivered via the PMOS pass device,
which is controlled by the error amplifier. The error amplifier
compares the reference voltage with the feedback voltage from the
output and amplifies the difference. If the feedback voltage is lower
than the reference voltage, the gate of the PMOS device is pulled
lower, allowing more current to flow and increasing the output vol-
tage. If the feedback voltage is higher than the reference voltage, the
gate of the PMOS device is pulled higher, allowing less current
to flow and decreasing the output voltage.
The ADP323 differs from the ADP322 except in that the output
voltage dividers are internally disconnected and the feedback
inputs of the error amplifiers are brought out for each output.
VIN1/VIN2
VIN1/VIN2
VBIAS
VBIAS
VIN3
GND
VIN3
GND
EN1
EN2
EN3
EN1
EN2
EN3
VOLTAGES/CURRENTS,
VOLTAGES/CURRENTS,
Figure 43. ADP322 Internal Block Diagram
Figure 44. ADP323 Internal Block Diagram
UVLO AND THERMAL
UVLO AND THERMAL
INTERNAL BIAS
INTERNAL BIAS
SHUTDOWN
SHUTDOWN
SHUTDOWN
SHUTDOWN
SHUTDOWN
SHUTDOWN
PROTECT
PROTECT
VOUT1
VOUT2
VOUT3
VOUT1
VOUT2
VOUT3
OVERCURRENT
OVERCURRENT
OVERCURRENT
OVERCURRENT
OVERCURRENT
OVERCURRENT
0.5V
REF
0.5V
REF
0.5V
REF
0.5V
REF
0.5V
REF
0.5V
REF
+
+
+
+
+
+
VOUT1
FB1
VOUT2
FB2
VOUT3
FB3
VOUT1
VOUT2
VOUT3
Rev. A | Page 15 of 24
The output voltage can be set using the following formulas:
The value of R1, R3, R5 should be less than 200 kΩ to minimize
errors in the output voltage caused by the FBx pin input
current. For example, when R1 and R2 each equal 200 kΩ, the
output voltage is 1.0 V. The output voltage error introduced by
the FBx pin input current is 2 mV or 0.20%, assuming a typical
FBx pin input current of 10 nA at 25°C.
The ADP322 is available in multiple output voltage options
ranging from 0.8 V to 3.3 V.
The ADP322/ADP323 use the EN1/EN2 and EN3 pins to
enable and disable the VOUT1/VOUT2/VOUT3 pins under
normal operating conditions. When the EN1/EN2 and EN3
pins are high, VOUT1/VOUT2/VOUT3 turn on; when the
EN1/EN2 and EN3 pins are low, VOUT1/VOUT2/VOUT3 turn
off. For automatic startup, the EN1/EN2 and EN3 pins can be
tied to VBIAS.
2.5V TO
1.8V TO
1.8V TO
V
V
V
5.5V
5.5V
5.5V
OUT
OUT2
OUT3
= 0.5 V(1 + R1/R2) + (FB
= 0.5 V(1 + R3/R4) + (FB
= 0.5 V(1 + R5/R6) + (FB
Figure 45. ADP323 Application Circuit Diagram
+
+
+
1µF
1µF
1µF
VIN1/VIN2
EN1
EN2
EN3
VBIAS
OFF
OFF
OFF
VIN3
ON
ON
ON
ADP323
EN LD1
EN LD2
EN LD3
VBIAS
LDO 1
VBIAS
LDO 2
VBIAS
LDO 3
IN
IN
IN
GND
)(R1)
)(R3)
)(R5)
ADP322/ADP323
FB1
FB2
FB3
R2
R4
R6
R1
R3
R5
VOUT1
VOUT2
VOUT3
+
+
+
1µF
1µF
1µF

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