EVM-915-DTS-BZS Linx Technologies, EVM-915-DTS-BZS Datasheet - Page 9

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EVM-915-DTS-BZS

Manufacturer Part Number
EVM-915-DTS-BZS
Description
RF Development Tools 915 MHz Wireless Module DTS Brazil
Manufacturer
Linx Technologies
Type
Wi-Fir
Datasheet

Specifications of EVM-915-DTS-BZS

Rohs
yes
Product
Evaluation Modules
Tool Is For Evaluation Of
Wi.232DTSB-R
Frequency
915 MHz
Operating Supply Voltage
3 V to 3.6 V
Interface Type
UART
Factory Pack Quantity
1
Operating States
The primary active state is the IDLE state. When the module is not actively
transmitting or receiving data, it is in this state. While in this state, the
receiver is enabled and the module is continuously listening for incoming
data. If the module detects a pre-amble and valid start-code, it will enter
the RX_HEADER state.
If the module is in the IDLE state and a byte is received by the UART, it will
enter the TX_WAIT state.
Preliminary Draft
MAC address that can be used by the host application for higher level,
connection oriented protocols. This MAC address can be read through
the command interface.
Figure 10: TX State Machine
Figure 9: RX State Machine
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Resetting Module to Factory Defaults
It may be necessary to reset the non-volatile registers to their factory
defaults. To reset the module to factory defaults, hold the command line
low and cycle power to or hardware-reset the module. The command line
must remain low for a minimum of 450ms after resetting the module. Once
the command line is released, the module’s non-volatile registers will be
reset to factory defaults.
Hardware Reset
By pulling C2CK/RST (pin 11) low, you will place the module’s protocol
controller in hardware reset. In this state, the module is in a safe, stalled
state. If your Vdd rise time is greater than 1ms, it will be necessary to hold
the module in reset until Vdd reaches 2.7V. There are many reset supervisor
ICs that can accomplish this task, such as the Microchip MCP130. See the
section on Rise Time for more information.
In order to cause the module to enter reset, C2CK/RST must be held low
for at least 20µs. Normal operation is restored when this pin is returned
high.
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Preliminary Draft

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