KITMMA9550LEVM Freescale Semiconductor, KITMMA9550LEVM Datasheet - Page 7

• Manufacturer Part Number: KITMMA9550LEVM
• Description: Acceleration Sensor Development Tools EVM KIT FOR MMA9550L
• Manufacturer: Freescale Semiconductor

Specifications of KITMMA9550LEVM

• Rohs: yes
• Tool Is For Evaluation Of: MMA955xL
• Acceleration: 2 g, 4 g, 8 g
• Sensing Axis: Triple Axis
• Interface Type: I2C, SPI
• Operating Voltage: 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Current: 3.1 mA
• Output Type: Analog, Digital

3
3.1
The MMA955xL device consists of a 3-axis, MEMS accelerometer and a mixed-signal ASIC with an integrated, 32-bit CPU. The
mixed-signal ASIC can be utilized to measure and condition the outputs of the MEMS accelerometer, internal temperature sensor,
or a differential analog signal from an external device.
These measured values can be read via the slave I
1. Preliminary data for memory sizes.
A block level view of is shown in the preceding figure and can be summarized at a high level as an analog/mixed-mode subsystem
associated with a digital engine:
Sensors
Freescale Semiconductor, Inc.
RESET
V
V
V
DD
• The analog sub-system is composed of:
• The digital sub-system is composed of:
SS
SS
General Description
Functional Overview
– A 3-axis transducer that is an entirely passive block including the MEMS structures.
– An Analog Front End (AFE) with the following:
– The 32-bit, ColdFire V1 CPU with a Background-Debug Module (BDM)
– Memory: RAM, ROM, and flash
– Rapid GPIO (RGPIO) port-control logic
– Timer functions include:
• A capacitance-to-voltage converter (C to V)
• An analog-to-digital converter
• A temperature sensor
• Modulo timer module (MTIM16)
• Programmable Delay Timer (PDB)
512 KB x 32
CLKGEN
INTC
BDM
DBG
1 KB x 32
4 KB x 32
ColdFire Core
Flash
with MAC
ROM
RAM
V1
BKGD
INT
Figure 1. Platform block diagram
ADC
I
Programmable
delay block
Two-channel, 16-bit
Timer / PWM module
16-bit
Modulo timer module
2
axis
mailbox
2
Control
C or SPI port or utilized internally within the MMA955xL platform.
C Master
X
INT_ O
Analog Front End (AFE)
and
C to V
axis
Y
I
SPI slave
2
C slave
axis
Z
Sensor
TPMCH0
TPMCH1
Temp
PDB_A
PDB_B
SDA0
SCLK
SCL1
SCL0
SCL0
AN0
AN1
SDO
SSB
SDI
(1)
SCL0/RGPIC0/SCLK
SDA0/RGPIO1/SDI
RGPIO2/SCL1/SDO
RGPIO3/SDA1/SSB
RGPIO4/INT
RGPIO5/PDB_A/INT_O
RGPIO6/AN0/TPMCH0
RGPIO7/AN1/TPMCH1
RGPIO8/PDB_B
BKGD/MS/RPGPIO9
V
V
DDA
SSA
MMA955xL
7