KITMMA9550LEVM Freescale Semiconductor, KITMMA9550LEVM Datasheet - Page 20

• Manufacturer Part Number: KITMMA9550LEVM
• Description: Acceleration Sensor Development Tools EVM KIT FOR MMA9550L
• Manufacturer: Freescale Semiconductor

Specifications of KITMMA9550LEVM

• Rohs: yes
• Tool Is For Evaluation Of: MMA955xL
• Acceleration: 2 g, 4 g, 8 g
• Sensing Axis: Triple Axis
• Interface Type: I2C, SPI
• Operating Voltage: 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Current: 3.1 mA
• Output Type: Analog, Digital

MMA955xL
20
4.12
Tests are conducted using the input levels specified in
measured from the 50-percent to 50-percent point. Rise and fall times are measured between the 10-percent and 90-percent
points, as shown in the following figure.
The subsequent figure shows the definitions of the following signal states:
4.13
Table 12. General timing characteristics
1.
2.
3.
V
POR release delay
Warm-up time
Frequency of operation
System clock period
Full/Slow clock ratio
Oscillator frequency absolute accuracy @ 25°C
Oscillator frequency variation over temperature
(-40°C to 85°C vs. ambient)
Minimum RESET assertion duration
DD
All conditions at nominal supply: V
This is the time measured from V
In the formulas, T = 1 system clock cycle. In full speed mode, T is nominally 125 ns. In slow speed mode, T is nominally 16 μs.
rise time
Input Signal
Note: The midpoint is V
• Active state, when a bus or signal is driven and enters a low-impedance state
• Three-stated, when a bus or signal is placed in a high-impedance state
• Data Valid state, when a signal level has reached V
• Data Invalid state, when a signal level is in transition between V
AC Electrical Characteristics
General Timing Control
Data Invalid State
Characteristic
(2)
Data1 Valid
Data1
DD
DD
Fall Time
= V
IL
= V
+ (V
POR
Data Active
Midpoint1
DDA
Figure 10. Input signal measurement references
until the internal reset signal is released.
IH
= 1.8 V
V
– V
IH
(1)
IL
)/2.
Symbol
Data1 Valid
t
t
T
F
T
F
T
CYCH
CYCL
t
POR
OPH
rvdd
OPL
WU
RA
Data2
Figure 11. Signal states
Table 5 on page
Low
V
IL
OL
Full Speed Clock
Full Speed Clock
Full Speed Clock
From STOP
or V
Condition(s)
10% to 90%
Slow Clock
Slow Clock
Slow Clock
Power-up
OH
17. Unless otherwise specified, propagation delays are
3-stated
Data
OL
NC
and V
Rise Time
OH
High
4T
0.35
Min
-6
-5
(3)
Data3 Valid
Data Active
Freescale Semiconductor, Inc.
Data3
62.5
Typ
125
128
16
7
8
90%
50%
10%
Max
1.5
+5
+6
1
Sensors
sample
periods
Unit
MHz
KHz
ms
ms
ns
μs
%
%