IS62WV12816BLL-55TLI-TR ISSI, Integrated Silicon Solution Inc, IS62WV12816BLL-55TLI-TR Datasheet - Page 10

• Manufacturer Part Number: IS62WV12816BLL-55TLI-TR
• Description: IC SRAM 2MBIT 55NS 44TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS62WV12816BLL-55TLI-TR

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 2M (128K x 16)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSOP II
• Density: 2Mb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: SDR
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 3mA
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 16b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

IS62WV12816ALL,
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at
2. WRITE = (CS1) [ (LB) = (UB) ] (WE).
10
AC WAVEFORMS
WRITE CYCLE NO. 1
least one of the LB and UB inputs being in the LOW state.
ADDRESS
LB, UB
DOUT
CS1
CS2
DIN
WE
(1,2)
(CS1 Controlled, OE = HIGH or LOW)
IS62WV12816BLL
t
DATA UNDEFINED
SA
Integrated Silicon Solution, Inc. — www.issi.com —
t
AW
t
HZWE
t
t
SCS2
SCS1
t
t
t
PWB
PWE
WC
HIGH-Z
t
SD
DATA-IN VALID
t
HA
t
t
LZWE
HD
1-800-379-4774
01/13/2010
Rev. H