EVAL-AD5629RSDZ Analog Devices, EVAL-AD5629RSDZ Datasheet

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EVAL-AD5629RSDZ

Manufacturer Part Number
EVAL-AD5629RSDZ
Description
Data Conversion IC Development Tools EVALUATION BOARD - TSSOP
Manufacturer
Analog Devices
Type
DACr
Datasheet

Specifications of EVAL-AD5629RSDZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD5629R
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
1
For Use With
EVAL-SDP-CB1Z
Data Sheet
FEATURES
Low power octal DACs
2.6 mm × 2.6 mm 16-ball WLCSP
4 mm × 4 mm 16-lead LFCSP and 16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA at 5 V, 200 nA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware
I
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
GENERAL DESCRIPTION
The AD5629R/AD5669R devices are low power, octal, 12-/16-
bit, buffered voltage-output DACs. All devices are guaranteed
monotonic by design.
The AD5629R/AD5669R have an on-chip reference with an
internal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,
5 ppm/°C reference, giving a full-scale output range of 2.5 V.
The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3
have a 2.5 V 5 ppm/°C reference, giving a full-scale output range
of 5 V depending on the option selected. Devices with 1.25 V
reference selected operate from a single 2.7 V to 5.5 V supply.
Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.
The on-chip reference is off at power-up, allowing the use of an
external reference. The internal reference is enabled via a
software write.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2
C-compatible serial interface supports standard (100 kHz)
AD5629R: 12 bits
AD5669R: 16 bits
and fast (400 kHz) modes
LDAC
A
E
A
and
CLR
A
E
A
functions
Document Feedback
with 5 ppm/°C On-Chip Reference
Octal, 12-/16-Bit, I
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
SDA
The parts incorporate a power-on reset circuit to ensure that the
DAC output powers up to 0 V (AD5629R-1/AD5629R-2,
AD5669R-1/AD5669R-2) or midscale (AD5629R-3/AD5669R-3)
and remains powered up at this level until a valid write takes
place. The part contains a power-down feature that reduces the
current consumption of the device to 400 nA at 5 V and
provides software-selectable output loads while in power-down
mode for any or all DAC channels.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
SCL
A0
Octal, 12-/16-bit DACs.
On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
Available in 16-lead LFCSP and TSSOP, and 16-ball
WLCSP.
Power-on reset to 0 V or midscale.
Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
LDAC
AD5629R/AD5669R
LDAC
CLR
FUNCTIONAL BLOCK DIAGRAM
©2010–2013 Analog Devices, Inc. All rights reserved.
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
POWER-ON RESET
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
AD5629R/AD5669R
V
DD
Figure 1.
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
2
C, denseDACs
POWER-DOWN LOGIC
V
REFIN
STRING
STRING
STRING
STRING
STRING
STRING
STRING
STRING
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
DAC H
/V
REFOUT
1.25V/2.5V REF
GND
www.analog.com
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
C
D
E
F
G
H

Related parts for EVAL-AD5629RSDZ

EVAL-AD5629RSDZ Summary of contents

Page 1

... Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...

Page 2

AD5629R/AD5669R TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Characteristics ........................................................................ Timing Characteristics .......................................................... ...

Page 3

Data Sheet SPECIFICATIONS kΩ to GND Table 1. Parameter Min STATIC PERFORMANCE 2 AD5629R Resolution 12 Relative Accuracy Differential Nonlinearity AD5669R Resolution 16 Relative Accuracy Differential Nonlinearity ...

Page 4

AD5629R/AD5669R Parameter Min LOGIC INPUTS 3 Input Current Input Low Voltage, V INL Input High Voltage INH Pin Capacitance POWER REQUIREMENTS V 4 (Normal Mode 4 5 ...

Page 5

Data Sheet kΩ to GND Table 2. Parameter Min STATIC PERFORMANCE 2 AD5629R Resolution 12 Relative Accuracy Differential Nonlinearity AD5669R Resolution 16 Relative Accuracy Differential Nonlinearity Zero-Code ...

Page 6

AD5629R/AD5669R Parameter Min POWER REQUIREMENTS V 2 (Normal Mode 2 3 (All Power-Down Modes 2 3 Temperature range is −40°C ...

Page 7

Data Sheet TIMING CHARACTERISTICS 5.5 V; all specifications T DD Table 4. Parameter Conditions Min f 1 Standard mode SCL Fast mode t Standard mode 4 1 Fast mode 0.6 t Standard ...

Page 8

AD5629R/AD5669R t 2 SCL SDA LDAC* CLR *ASYNCHRONOUS LDAC UPDATE MODE Figure 2. Serial Write Operation Rev. ...

Page 9

Data Sheet ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating V to GND −0 Digital Input Voltage to GND −0 GND −0 ...

Page 10

AD5629R/AD5669R PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD5629R/AD5669R OUT TOP VIEW (Not to Scale OUT OUT NOTES 1. EXPOSED PAD MUST BE TIED TO GND. Figure 3. 16-Lead LFCSP ...

Page 11

Data Sheet Table 6. Pin Function Descriptions Pin No. LFCSP TSSOP WLCSP Mnemonic LDAC OUT OUT ...

Page 12

AD5629R/AD5669R TYPICAL PERFORMANCE CHARACTERISTICS –2 –4 –6 –8 –10 0 10k 20k 30k 40k CODES Figure 6. INL AD5669R—External Reference 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 ...

Page 13

Data Sheet 1 INT REF = 2. 25°C A 0.5 0 –0.5 –1.0 0 10k 20k 30k 40k CODES Figure 12. DNL AD5669R-2—Internal Reference 0. INT REF = 2.5V 0.15 ...

Page 14

AD5629R/AD5669R –0.05 –0.10 FULL-SCALE ERROR –0.15 –0.20 GAIN ERROR –0.25 –0.30 –40 –25 – TEMPERATURE (°C) Figure 18. Gain Error and Full-Scale Error vs. Temperature ...

Page 15

Data Sheet 0 25°C A 0.3 0.2 0 3V, INT REF = 1.25V DD 0 –0.1 –0.2 –0 5V, INT REF = 2.5V DD –0.4 –0.5 –10 –8 –6 –4 – SOURCE/SINK ...

Page 16

AD5629R/AD5669R 2 25°C A 2.1 1.9 1 1.5 1.3 1 0.9 0.7 0 0.5 1.0 1.5 2.0 2.5 3.0 V (V) LOGIC Figure 30. Supply Current vs. Logic Input Voltage ...

Page 17

Data Sheet 0.0010 EXT REF = 25°C A 0.0005 0 –0.0005 –0.0010 –0.0015 TIME (µs) Figure 36. Analog Crosstalk 0.0020 0.0015 0.0010 0.0005 0 –0.0005 –0.0010 –0.0015 ...

Page 18

AD5629R/AD5669R 5.5V DD EXT REF = 25°C – ± 0.1V p-p REF FREQUENCY = 10kHz –40 –60 –80 –100 –120 –140 0 2000 4000 6000 FREQUENCY (Hz) Figure 42. Total ...

Page 19

Data Sheet TERMINOLOGY Relative Accuracy For the DAC, relative accuracy, or integral nonlinearity (INL measure of the maximum deviation in LSBs from a straight line passing through the endpoints of the DAC transfer function. Figure 5, Figure 6, ...

Page 20

AD5629R/AD5669R DAC-to-DAC Crosstalk DAC-to-DAC crosstalk is the glitch impulse transferred to the output of one DAC due to a digital code change and subsequent output change of another DAC. This includes both digital and analog crosstalk measured by ...

Page 21

Data Sheet THEORY OF OPERATION DIGITAL-TO-ANALOG CONVERTER (DAC) SECTION The AD5629R/AD5669R are fabricated on a CMOS process. The architecture consists of a string of DACs followed by an output buffer amplifier. Each part includes an internal 1.25 V/2 ...

Page 22

AD5629R/AD5669R OUTPUT AMPLIFIER The output buffer amplifier can generate rail-to-rail voltages on its output, which gives an output range amplifier is capable of driving a load of 2 kΩ in parallel with 1000 pF to ...

Page 23

Data Sheet 1 SCL SDA START BY MASTER FRAME 1 SLAVE ADDRESS 1 SCL (CONTINUED) SDA DB15 DB14 DB13 DB12 (CONTINUED) Table 8. Command Definitions Command Description Write ...

Page 24

AD5629R/AD5669R INTERNAL REFERENCE REGISTER The internal reference is available on all versions. The on-board reference is off at power-up by default. The on-board reference can be turned off user-programmable internal REF register by setting Bit DB0 ...

Page 25

Data Sheet POWER-DOWN MODES The AD5629R/AD5669R contain four separate modes of operation. Command 0100 is reserved for the power-down function (see Table 8). These modes are software-programmable by setting two bits, Bit DB9 and Bit DB8, in the control register. ...

Page 26

AD5629R/AD5669R Table 12. Power-Down Modes of Operation DB9 DB8 Operating Mode 0 0 Normal operation Power-down modes kΩ to GND 1 0 100 kΩ to GND 1 1 Three-state Table 13. 32-Bit Input Shift Register Contents for ...

Page 27

Data Sheet LDAC FUNCTION The outputs of all DACs can be updated simultaneously using the hardware LDAC pin. Synchronous LDAC The DAC registers are updated after new data is read in. LDAC can be permanently low or pulsed as in ...

Page 28

AD5629R/AD5669R OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE 0.15 0.05 4.10 0.35 4.00 SQ 0.30 3.90 0.25 13 0.65 12 BSC EXPOSED PAD 9 8 0.45 TOP VIEW BOTTOM VIEW 0.40 0.35 0.05 MAX 0.02 NOM COPLANARITY ...

Page 29

Data Sheet BALL A1 IDENTIFIER 0.650 0.595 0.540 SEATING PLANE 2.645 2.605 SQ 2.565 4 1.50 REF 0.50 REF TOP VIEW (BALL SIDE DOWN) SIDE VIEW COPLANARITY 0.05 0.340 0.270 0.320 0.240 0.300 0.210 Figure 58. 16-Ball Wafer Level Chip ...

Page 30

... AD5669RBCPZ-1-RL7 −40°C to +105°C AD5669RBCPZ-2-RL7 −40°C to +105°C AD5669RBCPZ-1500R7 −40°C to +105°C AD5669RBCPZ-2500R7 −40°C to +105°C AD5669RBCBZ-1-RL7 −40°C to +105°C EVAL-AD5629RSDZ EVAL-AD5669RSDZ RoHS Compliant Part. Package Package Description Option 16-Lead TSSOP RU-16 16-Lead TSSOP ...

Page 31

Data Sheet NOTES Rev Page AD5629R/AD5669R ...

Page 32

... AD5629R/AD5669R NOTES refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2010–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08819-0-2/13(B) Rev Page Data Sheet ...

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