HSC-ADC-EVALDZ Analog Devices, HSC-ADC-EVALDZ Datasheet - Page 10

• Manufacturer Part Number: HSC-ADC-EVALDZ
• Description: Data Conversion IC Development Tools Data Converter Evaluation Platform
• Manufacturer: Analog Devices
• Type: ADCr
• Series: HSC_EVALBOARDr

Specifications of HSC-ADC-EVALDZ

• Rohs: yes
• Product: Evaluation Platforms
• Tool Is For Evaluation Of: ADC Devices
• Interface Type: USB
• Operating Supply Voltage: 12 V
• Operating Supply Current: 3 A
• Factory Pack Quantity: 1
• For Use With: ADC Evaluation Boards

C
B
A
D
2
8
8
3
DGND
4
DNI
1
5
DGND
J1001
DGND
2.5VD
REFCLK1P
REFCLK1N
SD1P
SD1N
SD2P
SD2N
SD3P
SD3N
SD4P
SD4N
0.1UF
1
2
3
C1004
DNI
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C1008
C1010
C1012
C1014
C1016
C1018
C1020
C1022
C1024
C1026
156.250MEGHZ
OE
NC
GND
DNI
Y1001
OUT_N
VCC
OUT
REFCLK1+
REFCLK1-
SD1+
SD1-
SD2+
SD2-
SD3+
SD3-
SD4+
SD4-
DNI
R1003
4.7K
DNI
R1004
4.7K
6
5
4
DGND
3.3VD
REFCLK2N
REFCLK2P
R1001
5
DGND
100
SD5P
SD5N
SD6P
SD6N
SD7P
SD7N
SD8P
SD8N
DNI
7
7
1
2
FIN1001M5X
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
C1009
C1011
C1013
C1015
C1017
C1019
C1021
C1023
C1025
C1027
0.1UF
0.1UF
C1002
C1003
DNI
U1001
4
3
DNI
DNI
REFCLK2+
REFCLK2-
SD5+
SD5-
SD6+
SD6-
SD7+
SD7-
SD8+
SD8-
R1005
REFCLKX-
REFCLKX+
100
DNI
0.1UF
0.1UF
C1006
C1007
DNI
DNI
REFCLKL-
REFCLKL+
6
6
SD5+
SD5-
SD6+
SD6-
SD7+
SD7-
SD8+
SD8-
REFCLK1+
REFCLK1-
REFCLKX+
REFCLKX-
MGT_AVTT_1.2V
MGT_AVTT_1.2V
MGT_AVCC_1.0V
MGT_AVTT_1.2V
P
N
DGND
DGND
C1032
0.22UF
C1041
0.22UF
GTX
DGND
C1028
330UF
R1006
100
C1033
0.22UF
C1042
0.22UF
R3
R4
U3
U4
N3
N4
L3
L4
T6
T5
P6
P5
A5
B5
SD
DO
DIFF
DIFF
TRACE
C1029
4.7UF
MGTRXP0_115
MGTRXN0_115
MGTRXP1_115
MGTRXN1_115
MGTRXP2_115
MGTRXN2_115
MGTRXP3_115
MGTRXN3_115
MGTREFCLK0P_115
MGTREFCLK0N_115
MGTREFCLK1P_115
MGTREFCLK1N_115
MGTAVTTRCAL_115
MGTRREF_115
DIFF
NOT
XC6VLX75T-2FFG784C
C1034
0.22UF
C1043
0.22UF
C1051
4.7UF
CONNECTIONS
PAIR
PAIR
LENGTHS
CROSS
C1035
0.22UF
C1044
0.22UF
PAIRS
XC6VLX75T-2FFG784C
5
5
AC2
AE2
AG2
C2
E2
N2
R2
U2
MGTTXP0_115
MGTTXN0_115
MGTTXP1_115
MGTTXN1_115
MGTTXP2_115
MGTTXN2_115
MGTTXP3_115
MGTTXN3_115
TRACE
LANE
L2
C1036
0.22UF
C1045
0.22UF
BANKS
U101
V1
V2
T1
T2
P1
P2
M1
M2
MAY
BETWEEN
D4
F4
K4
M4
P4
V4
Y4
AB4
AF4
AH4
LENGTHS
U101
LENGTHS
C1037
0.22UF
C1046
0.22UF
BE
MOVED
R1006
C1052
4.7UF
C1038
0.22UF
C1047
0.22UF
MUST
MUST
SD1+
SD1-
SD2+
SD2-
SD3+
SD3-
SD4+
SD4-
REFCLK2+
REFCLK2-
REFCLKL+
REFCLKL-
C1030
4.7UF
C1039
0.22UF
C1048
0.22UF
TO
4
BE
AND
4
BE
P
N
HELP
MATCHED
DGND
MGT_AVCC_1.0V
C1031
330UF
C1040
0.22UF
C1049
0.22UF
AH1
AG3
AG4
AH2
AE3
AE4
AC3
AC4
AA4
AA3
MATCHED
FPGA
W4
W3
MGTRXP0_114
MGTRXN0_114
MGTRXP1_114
MGTRXN1_114
MGTRXP2_114
MGTRXN2_114
MGTRXP3_114
MGTRXN3_114
MGTREFCLK0P_114
MGTREFCLK0N_114
MGTREFCLK1P_114
MGTREFCLK1N_114
ROUTING
XC6VLX75T-2FFG784C
C1050
0.22UF
MUST
TO
TO
WITHIN
BE
MGTTXP0_114
MGTTXN0_114
MGTTXP1_114
MGTTXN1_114
MGTTXP2_114
MGTTXN2_114
MGTTXP3_114
MGTTXN3_114
WITHIN
I/O_10
SDA_B
DUT_CSB4
DUT_CSB3
DUT_CSB2
DUT_CSB1
I/O_8
I/O_6
I/O_4
I/O_2
EQUAL
DGND
U101
3
3
AF1
AF2
AD1
AD2
AB1
AB2
Y1
Y2
2065769-1
AG10
AG1
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
A10
A1
A2
A3
A4
A5
A6
A7
A8
A9
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
OF ANALOG DEVICES.
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
100
J1
GND
10
IN
I/O_9
SCL
DUT_CSB5
DUT_SDO
DUT_SDI
DUT_SCLK
I/O_7
I/O_5
I/O_3
I/O_1
AN
D
MILS
MILS
E
V
LENGTH
A
C
L G
O
E
DGND
S
2065769-1
BG10
BG1
BG2
BG3
BG4
BG5
BG6
BG7
BG8
BG9
B10
B1
B2
B3
B4
B5
B6
B7
B8
B9
DGND
J1
HADV6
DESIGN VIEW
PTD ENGINEER
-
<PRODUCT_1>
GND
<DESIGN_VIEW>
<PTD_ENGINEER>
B1
G4
G3
E3
E4
C3
C4
B2
A3
A4
J4
J3
AND
MGTRXP0_116
MGTRXN0_116
MGTRXP1_116
MGTRXN1_116
MGTRXP2_116
MGTRXN2_116
MGTRXP3_116
MGTRXN3_116
MGTREFCLK0P_116
MGTREFCLK0N_116
MGTREFCLK1P_116
MGTREFCLK1N_116
REV
REFCLK2P
REFCLK1P
XC6VLX75T-2FFG784C
GEOMETRY
SD1P
SD2P
SD3P
SD4P
SD5P
SD6P
SD7P
SD8P
2
2
DGND
2065769-1
DESCRIPTION
CG10
CG1
CG2
CG3
CG4
CG5
CG6
CG7
CG8
CG9
C1
C10
C2
C3
C4
C5
C6
C7
C8
C9
SCHEMATIC
J1
MGTTXP0_116
MGTTXN0_116
MGTTXP1_116
MGTTXN1_116
MGTTXP2_116
MGTTXN2_116
MGTTXP3_116
MGTTXN3_116
GND
REVISIONS
REFCLK2N
REFCLK1N
U101
K1
K2
H1
H2
F1
F2
D1
D2
SD1N
SD2N
SD3N
SD4N
SD5N
SD6N
SD7N
SD8N
DRAWING NO.
SIZE
D D D
-
D
DGND
SCALE
2065769-1
<SCALE>
DG10
D10
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG8
DG9
D1
D2
D3
D4
D5
D6
D7
D8
D9
DATE
J1
GND
1
SHEET
1
10
APPROVED
OF
D
REV
17
D
C
B
A