MA330026 Microchip Technology, MA330026 Datasheet - Page 47

• Manufacturer Part Number: MA330026
• Description: Daughter Cards & OEM Boards dsPIC33FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA330026

• Rohs: yes
• Product: Plug-In Modules
• Core: PIC
• Data Bus Width: 16 bit
• Description/function: dsPIC33F MC 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• For Use With: DM330021, DM330022, DM330023

TABLE 4-9:
TABLE 4-10:
P1TCON
P1TMR
P1TPER
P1SECMP
PWM1CON1
PWM1CON2
P1DTCON1
P1DTCON2
P1FLTACON
P1FLTBCON
P1OVDCON
P1DC1
P1DC2
P1DC3
PWM1KEY
Legend:
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
Legend:
SFR Name
SFR Name
— = unimplemented, read as ‘0’
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
020A
020C
SFR
0200
0202
0204
0206
0208
Addr.
01CA
01CC
01CE
01DA
01DE
01C0
01C2
01C4
01C6 SEVTDIR
01C8
01D0
01D2
01D4
01D6
01D8
6-OUTPUT PWM1 REGISTER MAP FOR dsPIC33FJ116MC10X DEVICES
I2C1 REGISTER MAP
ACKSTAT
Bit 15
I2CEN
PTDIR
Bit 15
PTEN
DTBPS<1:0>
—
—
—
—
—
—
—
—
—
—
—
—
Bit 14
TRSTAT
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
—
FAOV3H FAOV3L FAOV2H FAOV2L FAOV1H FAOV1L
FBOV3H FBOV3L FBOV2H FBOV2L FBOV1H FBOV1L
POVD3H POVD3L POVD2H POVD2L POVD1H POVD1L
PTSIDL
Bit 13
—
—
—
I2CSIDL
Bit 13
—
—
—
—
—
—
Bit 12
—
—
—
—
SCLREL
Bit 12
—
—
—
—
—
—
Bit 11
—
—
—
DTB<5:0>
IPMIEN
Bit 11
—
—
—
—
—
—
PMOD3
Bit 10
SEVOPS<3:0>
—
—
Bit 10
A10M
BCL
—
—
—
—
—
PMOD2
Bit 9
—
—
PWM Duty Cycle 1 Register
PWM Duty Cycle 2 Register
PWM Duty Cycle 3 Register
PWM Special Event Compare Register
GCSTAT
DISSLW
Bit 9
PWM Timer Count Value Register
PWM Time Base Period Register
—
—
—
PMOD1
PWMKEY <15:0>
Bit 8
—
—
ADD10
SMEN
Bit 8
—
—
FLTBM
FLTAM
Bit 7
DTAPS<1:0>
—
—
—
—
IWCOL
GCEN
Bit 7
PEN3H PEN2H
Bit 6
PTOPS<3:0>
—
—
—
—
—
POUT3H POUT3L POUT2H POUT2L POUT1H POUT1L 0011 1111 0000 0000
DTS3A
STREN
I2COV
Bit 5
Bit 6
—
—
—
Address Mask Register
PEN1H
DTS3I
ACKDT
Bit 4
Baud Rate Generator Register
Address Register
Bit 5
—
—
—
D_A
DTS2A
Bit 3
ACKEN
PTCKPS<1:0>
—
—
—
—
Transmit Register
Bit 4
Receive Register
DTA<5:0>
P
FBEN3
PEN3L
FAEN3
DTS2I
Bit 2
IUE
RCEN
Bit 3
S
OSYNC
PEN2L
DTS1A
FAEN2
FBEN2
Bit 1
PTMOD<1:0>
Bit 2
R_W
PEN
PEN1L
FAEN1
FBEN1 0000 0000 0000 0111
DTS1I
UDIS
Bit 0
RSEN
Bit 1
RBF
0000 0000 0000 0000
0000 0000 0000 0000
0111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Bit 0
SEN
Reset State
TBF
Resets
0000
00FF
0000
1000
0000
0000
0000
All