TFA9881D/N1,596 NXP Semiconductors, TFA9881D/N1,596 Datasheet
TFA9881D/N1,596
Specifications of TFA9881D/N1,596
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TFA9881D/N1,596 Summary of contents
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TFA9881 3.4 W PDM input class-D audio amplifier Rev. 3 — 23 April 2013 1. General description The TFA9881 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (Wafer Level Chip-Size Package) with a 400 m pitch. The ...
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... NXP Semiconductors Bandwidth extension to support low sampling frequencies Clip control for smooth clipping Mute mode ‘Pop noise' free at all mode transitions Short power-up time Short power-down time: 5 s 1.8 V/3.3 V tolerant digital inputs Low RF susceptibility ...
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... NXP Semiconductors 5. Ordering information Table 2. Ordering information Type number Package Name TFA9881UK WLCSP9 6. Block diagram Fig 1. TFA9881 Product data sheet Description wafer level chip-size package; 9 bumps; 1.3 x 1 DDD B1 SILENCE PATTERN DECODER A1 DATA LRSEL A2 PDM RECEIVER FILTER CLK C1 POWER DOWN CONTROL Block diagram All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning TFA9881 bump A1 index area Bottom view Fig 2. Bump configuration for WLCSP9 (bottom view) Fig 4. 7.2 Pin description Table 3. Symbol DATA LRSEL OUTB V DDD V DDP GND CLK TEST OUTA TFA9881 Product data sheet 2 3 010aaa700 Fig 3. ...
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... NXP Semiconductors 8. Functional description The TFA9881 is a high-efficiency mono Bridge Tied Load (BTL) class-D audio amplifier with a digital stereo PDM input interface. A High-Pass (HP) filter removes the DC components from the incoming PDM stream. This stream is subsequently converted into two PWM signals. A 3-level PWM scheme supports filterless speaker drive. ...
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... NXP Semiconductors Fig 5. Table 5. LRSEL pin state LOW HIGH 8.3 Power up/down sequence The TFA9881 power-up/power-down sequence is shown in supplies V switches to Operating mode. The TFA9881 should be switched to Power-down mode before the power supplies are disconnected or turned off. V DDP , V DDD 128·f or 64·f ...
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... NXP Semiconductors 8.4 Control settings Control settings are not needed if the default values are adequate. 8.4.1 Silence pattern recognition The TFA9881 can detect control settings on the PDM input by means of silence pattern recognition. A silence pattern has the following properties: • All audio bytes have the same value • ...
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... NXP Semiconductors Table 7. Byte 0xE4 0xAA [2] 0x66 [2] 0xAC [1] The related bytes are the bytes from the first column phase shifted and 7 bits. [2] A silence pattern containing this byte will be recognized once the TFA9881 has powered up. Table 8. Bytes .................... 33 ................................. 127, 128 129 8 ...
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... NXP Semiconductors Table 10. Setting slope low slope normal; default setting 8.4.5 Dynamic Power Stage Activation (DPSA) The TFA9881 uses DPSA to regulate current consumption in line with the level of the incoming audio stream. This function switches off power stage sections that are not needed, reducing current consumption. ...
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... NXP Semiconductors corner frequency where the noise is increasing. The bandwidth in clock input frequency. This bandwidth can be extended via the bandwidth extension silence pattern (0xE4; see the bandwidth extension setting. The bandwidth and the PWM switching frequency when bandwidth extension is on and off are given in Remark: The Bandwidth extension should be switched off when f Table 12 ...
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... NXP Semiconductors 8.5 High-pass filter The high-pass filter will block the DC components in the incoming audio stream. The cut-off frequency, f Equation f – high 3dB where k depends on the bandwidth extension setting (see • bandwidth extension is off • bandwidth extension high(3dB) off ...
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... NXP Semiconductors 8.6.3 Supply voltage protection mechanisms (UVP and OVP) UVP is activated, setting the outputs floating protection threshold, V supply voltage rises above 6.144 MHz. clk OVP is activated, setting the power stages floating, if the supply voltage rises above the overvoltage protection threshold, V ...
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... NXP Semiconductors 9. Internal circuitry Table 13. Internal circuitry Pin Symbol A1 DATA C1 CLK B1 V DDD B2 V DDP A2 LRSEL C2 TEST A3 OUTB C3 OUTA TFA9881 Product data sheet Equivalent circuit All information provided in this document is subject to legal disclaimers. Rev. 3 — 23 April 2013 TFA9881 3 ...
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... NXP Semiconductors 10. Limiting values Table 14. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V power supply voltage DDP V digital supply voltage DDD T junction temperature j T storage temperature stg T ambient temperature amb V voltage on pin electrostatic discharge voltage ...
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... NXP Semiconductors 12. Characteristics 12.1 DC characteristics Table 16. DC characteristics All parameters are guaranteed for V default settings, unless otherwise specified. amb Symbol Parameter V power supply voltage DDP V digital supply voltage DDD I power supply current DDP I digital supply current DDD Series resistance output power switches ...
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... NXP Semiconductors 12.2 AC characteristics Table 17. AC characteristics All parameters are guaranteed for V default settings, unless otherwise specified. amb Symbol Parameter Output power P RMS output power o(RMS) Performance output power efficiency po THD+N total harmonic distortion-plus-noise P V output noise voltage n(o) S/N signal-to-noise ratio ...
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... NXP Semiconductors 12.3 PDM timing characteristics Table 18. PDM timing characteristics All parameters are guaranteed for V default settings, unless otherwise specified. amb Symbol Parameter f clock frequency clk clock duty cycle clk t hold time h t set-up time su [ load resistance load inductance. ...
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... NXP Semiconductors 13. Application information 13.1 ElectroMagnetic Compatibility (EMC) EMC standards define to what degree a (sub)system is susceptible to externally imposed electromagnetic influences and to what degree a (sub)system is responsible for emitting electromagnetic signals, when in Standby mode or Operating mode. EMC immunity and emission values are normally measured over a frequency range from 180 kHz GHz ...
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... NXP Semiconductors 13.3 Typical application diagram (simplified) BASEBAND PROCESSOR PDM output Fig 10. Typical stereo application (simplified) TFA9881 Product data sheet A2 C2 DATA A1 CLK TFA9881UK C1 V DDD 1 CVDDD 100 DATA A1 CLK TFA9881UK C1 V DDD 1 CVDDD 100 nF All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 13.4 Curves measured in reference design (demonstration board) All measurements were taken with V off and slope normal, unless otherwise specified THD+N (%) 10 1 −1 10 −2 10 −3 10 −3 −2 − ( kHz kHz 100 Hz ...
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... NXP Semiconductors 10 THD+N (%) 1 −1 10 (1) −2 10 (2) − ( 500 mW 100 mW 3 DDP L 10 THD+N (%) 1 −1 10 (1) (2) −2 10 − ( ( 100 mW 3 DDP L Fig 12. THD function of frequency ...
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... NXP Semiconductors 10 THD+N+IMD (%) 1 −1 10 −2 10 − ( Hz). ripple ripple ( 217 Hz. ripple ( kHz. ripple ( kHz. ripple = 4 3 DDP 200 mV (RMS) ripple Fig 13. THD+N + power supply intermodulation distortion as a function of frequency 1 ...
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... NXP Semiconductors (1) A-weighted. (2) 20 kHz brickwall filter. Fig 16. S/N ratio as a function of output power ( , L (1) THD , L (2) THD , L (3) THD , L (4) THD 100 Hz, clip control off i Fig 17 ...
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... NXP Semiconductors 0.15 P (W) 0.10 0.05 0 −3 −2 − ( 3.6 V. DDP ( DDP = 44 8 Fig 18. Power dissipation as a function of output power 100 (1) η (%) 0.5 1.0 ( 3.6 V. DDP ( DDP = 44 8, L ...
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... NXP Semiconductors 14. Package outline WLCSP9: wafer level chip-size package; 9 bumps; 1.27 x 1.31 x 0.6 mm (Backside Coating included) ball A1 index area ball A1 1 index area Dimensions (mm are the original dimensions) Unit max 0.6 0.22 0.38 0.28 mm nom 0.20 0.36 0.26 1.27 1.31 min 0.18 0.34 0.24 Outline version IEC TFA9881 Fig 20. Package outline TFA9881 (WLCSP9) ...
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... NXP Semiconductors 15. Soldering of WLCSP packages 15.1 Introduction to soldering WLCSP packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface mount reflow soldering description” ...
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... NXP Semiconductors Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description”. 15.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • ...
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... NXP Semiconductors Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. Removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon ...
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... NXP Semiconductors 16. Revision history Table 20. Revision history Document ID Release date TFA9881 v.3 20130423 • Modifications: Update package outline TFA9881 v.2 20110401 • Modifications: Data sheet status changed to ‘Product data sheet’ • Table 16: parameter values changed - V TFA9881 v.1 20110105 TFA9881 Product data sheet Data sheet status ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 Mode selection and interfacing . . . . . . . . . . . . . 5 8.2 Digital stereo PDM audio input . . . . . . . . . . . . . 5 8.3 Power up/down sequence . . . . . . . . . . . . . . . . 6 8 ...