VS-ST650C20L1 Vishay Semiconductors, VS-ST650C20L1 Datasheet - Page 2

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VS-ST650C20L1

Manufacturer Part Number
VS-ST650C20L1
Description
SCR Modules 2000 Volt 790 Amp
Manufacturer
Vishay Semiconductors
Datasheet

Specifications of VS-ST650C20L1

Product Category
SCR Modules
Rohs
yes
On-state Rms Current (it Rms)
1557 A
Non Repetitive On-state Current
10100 A
Breakover Current Ibo Max
10700 A
Rated Repetitive Off-state Voltage Vdrm
2 kV
Off-state Leakage Current @ Vdrm Idrm
80 mA
On-state Voltage
2.07 V
Holding Current (ih Max)
600 mA
Gate Trigger Voltage (vgt)
3 V
Gate Trigger Current (igt)
200 mA
Maximum Operating Temperature
+ 125 C
Mounting Style
Chassis
Package / Case
TO-200AC (B-PUK)
Circuit Type
SCR
Current Rating
790 A
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
3
ST650C..L Series
Vishay High Power Products
www.vishay.com
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state
slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Maximum turn-off time
BLOCKING
PARAMETER
Maximum critical rate of rise of off-state voltage
Maximum peak reverse and off-state leakage current
2
2
t for fusing
√t for fusing
For technical questions, contact: ind-modules@vishay.com
SYMBOL
SYMBOL
V
V
I
I
T(RMS)
I
dI/dt
T(AV)
T(TO)1
T(TO)2
V
TSM
I
I
r
r
I
I
t
t
2
2
t1
t2
TM
H
L
d
q
t
√t
Phase Control Thyristors
(Hockey PUK Version),
SYMBOL
dV/dt
I
I
RRM
DRM
180° conduction, half sine wave
Double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x π x I
(I > π x I
(16.7 % x π x I
(I > π x I
I
T
Gate drive 20 V, 20 Ω, t
T
Gate current 1 A, dI
V
I
V
pk
TM
J
J
d
R
,
= 25 °C, anode supply 12 V resistive load
= T
= 1700 A, T
= 0.67 % V
= 50, dV/dt = 20 V/µs, Gate 0 V 100 Ω, t
= 750 A, T
790 A
J
maximum, anode voltage ≤ 80 % V
T(AV)
T(AV)
T
T
J
J
= T
= T
), T
), T
No voltage
reapplied
100 % V
reapplied
No voltage
reapplied
100 % V
reapplied
DRM
J
T(AV)
T(AV)
J
= T
J
J
J
J
= T
TEST CONDITIONS
TEST CONDITIONS
maximum linear to 80 % rated V
maximum, rated V
= T
= T
, T
J
< I < π x I
< I < π x I
J
g
maximum, dI/dt = 60 A/µs
/dt = 1 A/µs
J
J
J
maximum, t
TEST CONDITIONS
= 25 °C
maximum
maximum
RRM
RRM
r
≤ 1 µs
T(AV)
T(AV)
Sinusoidal half wave,
initial T
p
), T
), T
= 10 ms sine pulse
DRM
J
J
J
= T
= T
= T
/V
J
J
J
RRM
DRM
maximum
maximum
maximum
p
= 500 µs
applied
DRM
Document Number: 93738
790 (324)
VALUES
VALUES
55 (85)
10 100
10 700
VALUES
1857
8600
9150
5100
1000
1000
Revision: 13-Aug-08
1.04
1.13
0.61
0.35
2.07
200
510
475
370
347
600
1.0
500
80
UNITS
UNITS
kA
kA
A/µs
UNITS
mA
°C
µs
V/µs
A
A
V
V
mA
2
2
√s
s

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