AT45DB011D-SH-T Atmel, AT45DB011D-SH-T Datasheet - Page 6

• Manufacturer Part Number: AT45DB011D-SH-T
• Description: IC FLASH 1MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB011D-SH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 1M (512 pages x 264 bytes)
• Speed: 66MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Data Bus Width: 8 bit
• Architecture: Sectored
• Interface Type: SPI Serial
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 25 mA
• Mounting Style: SMD/SMT
• Organization: 32 KB x 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3
6.4
6
Continuous Array Read (Low Frequency Mode: 03H): Up to 33 MHz
Main Memory Page Read
AT45DB011D
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The maximum SCK frequency allowable for the Continuous
Array Read is defined by the f
buffer and leaves the contents of the buffer unchanged.
This command can be used with the serial interface to read the main memory array sequentially
without a dummy byte up to maximum frequencies specified by f
read array with the page size set to 264 bytes, the CS must first be asserted then an opcode,
03H, must be clocked into the device followed by three address bytes (which comprise the 24-bit
page and byte address sequence). The first 9 bits (PA8 - PA0) of the 18-bit address sequence
specify which page of the main memory array to read, and the last 9 bits (BA8 - BA0) of the
18-bit address sequence specify the starting byte address within the page. To perform a contin-
uous read with the page size set to 256 bytes, the opcode, 03H, must be clocked into the device
followed by three address bytes (A16 - A0). Following the address bytes, additional clock pulses
on the SCK pin will result in data being output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The Continuous Array Read bypasses the data buffer and
leaves the contents of the buffer unchanged.
A main memory page read allows the user to read data directly from any one of the 2,048 pages
in the main memory, bypassing the data buffer and leaving the contents of the buffer
unchanged. To start a page read from the DataFlash standard page size (264 bytes), an opcode
of D2H must be clocked into the device followed by three address bytes (which comprise the
24-bit page and byte address sequence) and 4 don’t care bytes. The first 9 bits (PA8 - PA0) of
the 18-bit address sequence specify the page in main memory to be read, and the last 9 bits
(BA8 - BA0) of the 18-bit address sequence specify the starting byte address within that page.
To start a page read from the binary page size (256 bytes), the opcode D2H must be
clocked into the device followed by three address bytes and 4 don’t care bytes. The first 9 bits
(A16 - A8) of the 17-bit sequence specify which page of the main memory array to read, and the
last 8 bits (A7 - A0) of the 17-bit address sequence specify the starting byte address within the
page. The don’t care bytes that follow the address bytes are sent to initialize the read operation.
Following the don’t care bytes, additional pulses on SCK result in data being output on the SO
(serial output) pin. The CS pin must remain low during the loading of the opcode, the address
bytes, the don’t care bytes, and the reading of data. When the end of a page in main memory is
CAR1
specification. The Continuous Array Read bypasses the data
CAR2
. To perform a continuous
3639H–DFLASH–04/09